
MC68HC68T1
18
MOTOROLA
Address Byte
The address byte is always the first byte entered after SS
goes true. To transmit a new address, SS must first be
brought low and then taken high again.
A7
A6
A5
A4
A3
A2
A1
A0
LSB
MSB
A7 — High initiates one or more write cycles.
Low initiates one or more read cycles.
A6 — Must be low (zero) for normal operation.
A5 — High signifies a clock/calendar location.
Low signifies a RAM location.
A0 – A4 — Remaining address bits (see Figure 5).
Address and Data
Data transfers can occur one byte at a time or in multi–byte
burst mode (see Figures 16 and 17). After the MC68HC68T1
is enabled (SS = high), an address byte selects either a read
or a write of the Clock/Calendar or RAM. For a single–byte
read or write, one byte is transferred to or from the Clock/Cal-
endar register or RAM location specified by an address.
Additional reading or writing requires re–enabling the device
and providing a new address byte. If the MC68HC68T1 is not
disabled, additional bytes can be read or written in a burst
mode. Each read or write cycle causes the Clock/Calendar
register or RAM address to automatically increment. Incre-
menting continues after each byte transfer until the device is
disabled. After incrementing to $1F or $9F, the address
wraps to $00 and continues if the RAM is selected. When the
Clock/Calendar is selected, the address wraps to $20 after
incrementing to $32 to $B2.
MOSI
SCK
ADDRESS BYTE
DATA BYTE
SS
MISO
MOSI
ADDRESS BYTE
WRITE
READ
DATA BYTE
Figure 16. Single–Byte Transfer Waveforms
MOSI
ADDRESS BYTE
SCK
SS
MISO
MOSI
WRITE
READ
ADDRESS BYTE
DATA BYTE 0
DATA BYTE 1
DATA BYTE n
ADDRESS BYTE
ADDRESS BYTE + 1
ADDRESS BYTE + n
W/R ADDRESS
Figure 17. Multiple–Byte Transfer Waveforms