參數(shù)資料
型號(hào)： MC68HC68T1
廠商： Motorola, Inc.
英文描述： Real-Time Clock plus RAM with Serial Interface
中文描述： 實(shí)時(shí)時(shí)鐘加RAM的串行接口
文件頁(yè)數(shù)： 10/26頁(yè)
文件大?。?/td> 342K
代理商： MC68HC68T1
MC68HC68T1
10
MOTOROLA
Table 1. Clock/Calendar and Alarm Data Modes
Address Location
Read
Write
Function
Decimal Range
BCD Data Range
BCD Date* Example
$20
$A0
Seconds
0 – 59
00 – 59
21
$21
$A1
Minutes
0 – 59
00 – 59
40
$22
$A2
Hours** (12 Hour Mode)
1 – 12
81 – 92 (AM)
A1 – B2 (PM)
90
Hours (24 Hour Mode)
0 – 23
00 – 23
10
$23
$A3
Day of Week (Sunday = 1)
1 – 7
01 – 07
03
$24
$A4
Date of Month
1 – 31
01 – 31
16
$25
$A5
Month (Jan = 1)
1 – 12
01 – 12
06
$26
$A6
Year
0 – 99
00 – 99
87
N/A
$A8
Seconds Alarm
0 – 59
00 – 59
21
N/A
$A9
Minutes Alarm
0 – 59
00 – 59
40
N/A
$AA
Hours Alarm*** (12 Hour Mode)
1 – 12
01 – 12 (AM)
21 – 32 (PM)
10
Hours Alarm (24 Hour Mode)
0 – 23
00 – 23
10
N/A = Not Applicable
*Example: 10:40:21 AM, Tuesday, June 16, 1987.
**Most significant data bit, D7, is “0” for 24–hour mode and “1” for 12–hour mode. Data bit D5 is “1” for PM and “0” for AM in 12–hour mode.
***Data bit D5 is “1” for PM and “0” for AM in 12–hour mode. Data bits D7 and D6 are Don’t Cares.
Table 2. Watchdog Service and Reset Times
50 Hz
60 Hz
XTAL
Min
Max
Min
Max
Min
Max
Service Time
—
10 ms
—
8.3 ms
—
7.8 ms
Reset Time
20 ms
40 ms
16.7 ms
33.3 ms
15.6 ms
31.3 ms
NOTE: Reset does not occur immediately after slave select is toggled. Approximately two clock cycles later,
reset initiates.
SERVICE
TIME
SERVICE
TIME
SS
SCK
CPUR
Figure 7. Watchdog Operation Waveforms
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