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參數資料
| 型號： | MC68HC58DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), LOCAL AREA NETWORK CONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數： | 49/102頁 |
| 文件大小： | 700K |
| 代理商： | MC68HC58DW |
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MOTOROLA
DATA LINK CONTROLLER OPERATION
MC68HC58
4-6
TECHNICAL DATA
Figure 4-4 Parallel Mode Byte Format
DLC command bytes are transferred before the accompanying data byte. When using
the parallel host interface, the DLC requires command bytes only for the first and last
byte(s) in a frame. A DLC command byte must be accompanied by another byte (data,
null, or configuration) in order for the command to be latched. A command byte is not
required to load each data byte into the TxFIFO buffer, but a data byte is required for
a command to execute. Table 4-1 shows the types of parallel transfers.
The status byte value is frozen while CS is asserted. Any changes that occur while CS
is asserted are reflected in the status byte when CS is next asserted.
The DLC interrupt request line is cleared when CS is asserted and the status byte is
read. When CS is negated, the DLC parallel lines are disabled, and go into a high im-
pedance state.
4.2.1.2 Servicing Sequence
The host MCU services the DLC in the following sequence:
1. Read status byte.
2. Read receive data (if required).
3. Write command byte.
4. Write transmit data, configuration, or null byte (if preceded by command byte).
The four operations form a complete service sequence. However, all four operations
are not required in every host/DLC transfer.
Table 4-1 Parallel Transfers
ADDR0
R/W
Type of Transfer
0
Command byte
0
1
Status byte
1
0
Transmit byte or configuration byte
1
Receive byte or completion code
COMMAND BYTE[7:0]
ADDR0
R/W=0
R/W=1
DLC PARALLEL BYTE FORMAT
STATUS BYTE[7:0]
TRANSMIT BYTE[7:0]
RECEIVE BYTE[7:0]
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