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參數(shù)資料
| 型號： | MC68HC2681P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 42/88頁 |
| 文件大小： | 461K |
| 代理商： | MC68HC2681P |
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Programming and Register Descriptions
MOTOROLA
MC68HC681 USER’S MANUAL
4-17
4
4.3.6 Channel B Clock-Select Register (CSRB)
The bit definitions for this register are identical to those for CSRA, except that all control
actions apply to the channel B receiver and transmitter and their corresponding inputs and
outputs.
4.3.6.1 CHANNEL B RECEIVER CLOCK SELECT - CSRB[7:4]. When
CSRB[7:5] = 111, the receiver uses the external clock connected to parallel input IP2.
4.3.6.2 CHANNEL B TRANSMITTER CLOCK SELECT - CSRB[3:0]. When
CSRB[3:1] = 111, the transmitter uses the external clock connected to parallel input IP5.
4.3.7 Channel A Command Register (CRA)
The command(s) to be issued are encoded in the data value written to the command
register address. Multiple commands can be specified in a single write to CRA provided
the commands are nonconflicting; e.g., the "enable transmitter" and "reset transmitter"
commands cannot be specified in a single command word.
4.3.7.1 CRA[7]. This bit is not used and may be set to either zero or one.
4.3.7.2 CHANNEL A MISCELLANEOUS COMMANDS - CRA[6:4]. The encoded value
of this field specifies a single command as follows:
CRA[6:4]
COMMAND
0 0 0
No command.
0 0 1
Reset Mode Register Pointer. This command causes the channel A mode register pointer to point to mode register one.
0 1 0
Reset Receiver. This command resets the channel A receiver. The receiver is immediately disabled, the RxRDY and FFULL bits
in the SRA are cleared, and the RxFIFO pointer is reinitialized. All other registers are unaltered. This command should be used
in lieu of the receiver disable command whenever the receiver configuration is to be changed, as it places the receiver in a
guaranteed known state.
0 1 1
Reset Transmitter. This command resets the channel A transmitter. The transmitter is immediately disabled and the TxRDY and
TxEMT bits in the SRA are cleared. All other registers are unaltered. This command should be used in lieu of the transmitter
disable command whenever the transmitter configuration is to be changed, as it places the receiver in a guaranteed known
state.
1 0 0
Reset Error Status. This command clears the channel A received break (RB), parity error (PE), framing error (FE), and overrun
error (OE) flags in the status register (SRA[7:4]). This command is used in the character mode to clear OE status (RB, PE, and
FE bits will also be cleared) and is used in the block mode to clear all error status flags after a block of data has been received.
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