參數(shù)資料
型號： MC68HC2681P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 40/88頁
文件大?。?/td> 461K
代理商： MC68HC2681P
Programming and Register Descriptions
MOTOROLA
MC68HC681 USER’S MANUAL
4-15
4
The second diagnostic mode is the remote-loopback mode, selected by MR2A(7:6] = 11.
Received data is reclocked and retransmitted on the channel A transmitter serial-data
output.
The receive clock is used for the transmitter.
Received data cannot be read by the local CPU and the error status conditions are
inactive.
The received parity is not checked and is not recalculated for transmission; i.e., the
transmitted parity bit is as received.
The receiver must be enabled.
Character framing is not checked, and the stop bits are retransmitted as received.
A received break is echoed as received until the next valid start bit is detected.
Switching between modes should be done only while the channel is disabled.
4.3.2.2 CHANNEL A TRANSMITTER REQUEST-TO-SEND CONTROL - MR2A[5].
This bit controls the negation of the channel A transmitter request-to-send (RTSA) parallel
output (OP0) by the transmitter. OP0 must be asserted before each message by setting
OPR[0]. MR2A[5] = 1 causes OPR[0] to be cleared automatically one bit time after the
characters in the channel A transmit shift register and the transmit holding register, if any,
are completely transmitted, including the programmed number of stop bits, and the
transmitter is disabled. This feature can indicate the end of a message as follows:
1. Program the DUART for the automatic-reset mode: MR2A[5] = 1.
2. Enable the transmitter.
3. Assert channel A transmitter request-to-send control: OPR[0] = 1.
4. Send the message.
5. Disable the transmitter. The transmitter can be disabled any time after the last
character has been loaded into the transmit holding register. Note, however, that
disabling the transmitter forces the TxRDY and TxEMT status bits in the status
register to be inactive. If it is necessary to know when the last character transmission
is complete, do not disable the transmitter until transmission is complete, as
signalled by TxEMT. In the MC68681, if the transmitter was disabled after
transmission was complete, RTS would not be negated. This is not true in the
MC68HC681.
6. The last character will be transmitted and OPR[0] will be cleared one bit time after
the last stop bit, causing the channel A transmitter request-to-send control to be
negated. Note that in this mode, a character in the holding register at the time of the
disable command is not held back. In the MC68681, if (1) clear-to-send control was
enabled (see Paragraph 4.3.2.3), (2) the transmitter was disabled with a character
in the holding register, and (3) CTS was negated at the time of the disable
command, the character in the holding register would not be sent, even if CTS was
later asserted. This is not true in the MC68HC681.)
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