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參數(shù)資料
| 型號： | MC68HC2681P |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 29/88頁 |
| 文件大?。?/td> | 726K |
| 代理商： | MC68HC2681P |
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Programming and Register Descriptions
MOTOROLA
MC68HC681 USER’S MANUAL
4-5
4
Table 4-4 summarizes the various clock sources that can be selected for the counter/
timer.
Customers should use caution if the contents of a register are changed during receiver/
transmitter operation as certain changes can produce undesired results. For example,
changing the number of bits per character while the transmitter is active can transmit an
incorrect character. The contents of the clock-select register (CSR) and bit 7 of the
auxiliary control register (ACR[7]) should only be changed after the receiver(s) and
transmitter(s) have been issued software Rx and Tx reset commands. Most bits of the
mode registers should not be changed during receiver/transmitter operation, except that
in multidrop parity mode, the address/data parity type bit can be changed at any time.
TxRDYA
OPCR[6] = 1*
TxRDYB
OPCR[7] = 1*
RxRDYA
OPCR[4] = 1
MR1A[6] = 0*
RxRDYB
OPCR[5] = 1
MR1B[6] = 0*
FFULLA
OPCR[4] = 1,
MR1A[6] = 1*
FFULLB
OPCR[5] = 1
MR1B[6] = 1*
RxRTRA
MR1A[7] = 1
TxRTSA
MR2A[5] = 1
RxRTRB
MR1B[7] = 1
TxRTSB
MR2B[5] = 1
NOTE:
The pin requires a pull-up resistor.
Table 4-4. Selection of Clock Sources for the Counter/Timer
ACR[6] = 0 (COUNTER MODE)
ACR[6] = 1 (TIMER MODE)
COUNTER MODE CLOCK SOURCES
ACR[5:4] =
TIMER MODE CLOCK SOURCES
ACR[5:4] =
Input Port Pin IP2
00
Input Port Pin IP2
00
Channel A 1X Transmitter Clock TxCA
01
Input Port Pin IP2 Divided by 16
01
Channel B 1X Transmitter Clock TxCB
10
Crystal/Clock X1
10
Crystal/Clock X1 Divided by 16
11
Crystal/Clock X1 Divided by 16
11
Table 4-3. Programming of Output Port Functions (Continued)
FUNCTION
OUTPUT PORT PIN
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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