List of Figures
MC68HC912B32 MC68HC12BE32 — Rev. 3.0
Advance Information
MOTOROLA
List of Figures
21
Figure
Title
Page
13-10 Timer Count Registers (TCNT). . . . . . . . . . . . . . . . . . . . . . . .236
13-11 Timer System Control Register (TSCR) . . . . . . . . . . . . . . . . .237
13-12 Timer Control Register 1 (TCTL1) . . . . . . . . . . . . . . . . . . . . .238
13-13 Timer Control Register 2 (TCTL2) . . . . . . . . . . . . . . . . . . . . .238
13-14 Timer Control Register 3 (TCTL3) . . . . . . . . . . . . . . . . . . . . .240
13-15 Timer Control Register 4 (TCTL4) . . . . . . . . . . . . . . . . . . . . .240
13-16 Timer Interrupt Mask 1 Register (TMSK1) . . . . . . . . . . . . . . .241
13-17 Timer Interrupt Mask 2 Register (TMSK2) . . . . . . . . . . . . . . .241
13-18 Main Timer Interrupt Flag 1 (TFLG1) . . . . . . . . . . . . . . . . . . .243
13-19 C3F-C0F Interrupt Flag Setting . . . . . . . . . . . . . . . . . . . . . . .243
13-20 Main Timer Interrupt Flag 2 (TFLG2) . . . . . . . . . . . . . . . . . . .244
13-21 Timer Input Capture/Output Compare Register 0 (TC0). . . . .244
13-22 Timer Input Capture/Output Compare Register 1 (TC1). . . . .245
13-23 Timer Input Capture/Output Compare Register 2 (TC2). . . . .245
13-24 Timer Input Capture/Output Compare Register 3 (TC3). . . . .245
13-25 Timer Input Capture/Output Compare Register 4 (TC4). . . . .246
13-26 Timer Input Capture/Output Compare Register 5 (TC5). . . . .246
13-27 Timer Input Capture/Output Compare Register 6 (TC6). . . . .246
13-28 Timer Input Capture/Output Compare Register 7 (TC7). . . . .247
13-29 16-Bit Pulse Accumulator A Control Register (PACTL) . . . . .248
13-30 Pulse Accumulator A Flag Register (PAFLG). . . . . . . . . . . . .250
13-31 Pulse Accumulator Count Register 3 (PACN3) . . . . . . . . . . .251
13-32 Pulse Accumulator Count Register 2 (PACN2) . . . . . . . . . . .251
13-33 Pulse Accumulator Count Register 1 (PACN1) . . . . . . . . . . .252
13-34 Pulse Accumulator Count Register 0 (PACN0) . . . . . . . . . . .252
13-35 16-Bit Modulus Down-Counter
Control Register (MCCTL). . . . . . . . . . . . . . . . . . . . . . . . .253
13-36 16-Bit Modulus Down-Counter
Flag Register (MCFLG) . . . . . . . . . . . . . . . . . . . . . . . . . . .255
13-37 Input Control Pulse Accumulators
Control Register (ICPACR) . . . . . . . . . . . . . . . . . . . . . . . .256
13-38 Delay Counter Control Register (DLYCT). . . . . . . . . . . . . . . .257
13-39 Input Control Overwrite Register (ICOVW). . . . . . . . . . . . . . .258
13-40 Input Control System Control Register (ICSYS). . . . . . . . . . .258
13-41 Timer Test Register (TIMTST) . . . . . . . . . . . . . . . . . . . . . . . .261
13-42 Timer Port Data Register (PORTT) . . . . . . . . . . . . . . . . . . . .262