MOTOROLA
vi
MC68HC11KW1
TABLE OF CONTENTS
Paragraph
Number
Page
Number
TITLE
8
SERIAL PERIPHERAL INTERFACE
8.1
8.2
8.2.1
8.3
8.3.1
8.3.2
8.3.3
8.3.4
8.4
8.5
8.5.1
8.5.2
8.5.3
8.5.4
Functional description ...........................................................................................8-1
SPI transfer formats...............................................................................................8-2
Clock phase and polarity controls....................................................................8-3
SPI signals ............................................................................................................8-3
Master in slave out...........................................................................................8-4
Master out slave in...........................................................................................8-4
Serial clock ......................................................................................................8-4
Slave select......................................................................................................8-4
SPI system errors..................................................................................................8-5
SPI registers..........................................................................................................8-5
SPCR — SPI control register...........................................................................8-6
SPSR — SPI status register............................................................................8-8
SPDR — SPI data register ..............................................................................8-9
OPT2 — System configuration options register 2............................................8-9
9
TIMING SYSTEM
9.1
9.1.1
9.1.2
9.1.2.1
9.1.2.2
9.1.2.3
9.1.3
9.1.3.1
9.1.3.2
9.1.3.3
9.1.3.4
9.1.3.5
9.1.3.6
9.1.3.7
9.1.3.8
9.1.3.9
9.1.3.10
9.2
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
Timer 1 ..................................................................................................................9-1
Timer 1 structure..............................................................................................9-3
Input capture....................................................................................................9-4
TCTL2 — Timer control register 2..............................................................9-6
TIC1–TIC3 — Timer input capture registers ..............................................9-7
TI4/O5 — Timer input capture 4/output compare 5 register.......................9-7
Output compare...............................................................................................9-8
TOC1–TOC4 — Timer output compare registers.......................................9-9
CFORC — Timer compare force register...................................................9-9
OC1M — Output compare 1 mask register................................................9-10
OC1D — Output compare 1 data register..................................................9-10
TCNT — Timer counter register.................................................................9-11
TCTL1 — Timer control register 1..............................................................9-11
TMSK1 — Timer interrupt mask register 1.................................................9-12
TFLG1 — Timer interrupt flag register 1 ....................................................9-13
TMSK2 — Timer interrupt mask register 2.................................................9-14
TFLG2 — Timer interrupt flag register 2 ....................................................9-15
Timer 2 ..................................................................................................................9-15
Output compare...............................................................................................9-18
Input capture....................................................................................................9-18
F23FRC — Compare force register for Timers 2 and 3...................................9-18
T2C4 — Timer 2 channel 4 register.................................................................9-19
T2OC1–T2OC3 — Timer 2 output compare registers.....................................9-19
TCNT2 — Timer 2 counter register..................................................................9-20
TPG
8