參數(shù)資料
型號: MC68HC11K1
廠商: Motorola, Inc.
元件分類: 8位微控制器
英文描述: 8-Bit Microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件頁數(shù): 9/20頁
文件大小: 286K
代理商: MC68HC11K1
AN1242/D
MOTOROLA
9
3. Produce The Two-Chip System Memory Map
This step is best explained by continuing with the example application. First, examine the memory map of
the M68HC11 derivative to be used and locate areas not occupied by internal memory resources. These
openings in the 16-bit address space are available for memory mapping external devices. For
MC68HC11K(0/1) devices, the following ranges are externally addressable.
$0380 to $0D7F
$1000 to $FFFF ($2000 to $FFFF if CSIO is used)
A 60 Kbyte block of space is available from $1000 to $FFFF in expanded operating mode. However, if the
I/O chip select (CSIO) function implemented in M68HC11K devices is used, this area is reduced to 56
Kbytes from $2000 to $FFFF.
Allocating space to CSIO allows use of a memory-mapped display controller instead of a display controller
with a serial or a parallel interface. A number of manufacturers provide a complete LCD solution that in-
cludes an intelligent display controller. The controller can be connected directly to a microcontroller address/
data bus if slow access times can be managed. The CSIO signal is ideal for this purpose because it can be
stretched by up to three E clock cycles. CSIO requires the fixed 4 Kbyte block of addresses from $1000 to
$1FFF in order to operate.
Compile the memory map for the two chip system by listing the following address ranges:
M68HC11 SRAM
M68HC11 register block
M68HC11 EEPROM, if used
M68HC11 fixed chip select address ranges, if used
256 byte PSD register block
PSD SRAM, if used
PSD EPROM blocks
Figure 5
shows the combined memory map for the example application.
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