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參數(shù)資料
| 型號： | MC68HC11K1 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller(8位微控制器) |
| 中文描述： | 8位微控制器（8位微控制器） |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 286K |
| 代理商： | MC68HC11K1 |
AN1242/D
MOTOROLA
13
A few small differences in I/O functionality should be noted:
I/O ports on some M68HC11 devices have assignable pull-up resistors. For example, the PPAR reg-
ister at $002C on M68HC11K MCUs can enable pull-up devices on Ports G and H in all modes and
on Ports B and F only in single-chip mode. This feature is not available on PSD4XX or PSD5XX de-
vices, so external pull-ups may be needed.
I/O Ports B, C, and F on M68HC11K MCUs do not have any sort of control or alternate function reg-
isters, although Port C can be placed in open drain mode with the CWOM bit in the OPT2 register at
$0038. If this functionality must be maintained, replace Port C on the MC68HC711K4 with PSD4XX
or PSD5XX Port D. The open drain control register (PD_OPN_DRN in the table above) allows each
PSD Port D I/O pin to be configured for normal or open drain mode.
The PGAR register at $002D is used to enable the memory expansion address lines associated with
Port G bits 0 to 5. Setting bits in this register to 1 overrides the Port G I/O functions and enables the
associated XA lines. This register is set to $00 after reset.
Chip select control registers CSCTL, GPCS1A, and GPCS2A, located respectively at $005B, $005C,
and $005E, override the I/O functions of Port H bits 4 to 7. In expanded operating mode, GPCS1A
and GPCS2A are set to $00 after reset, thus disabling general purpose chip selects 1 and 2 (CSGP1
and CSGP2). CSCTL will be set to $04 after reset, leaving the I/O chip select (CSIO) disabled and
the program chip select (CSPROG) enabled. Write CSCTL to $00 to disable CSPROG and make the
PH7/CSPROG pin available for I/O. CSPROG is not required for interfacing to the PSD, although it
can be used in conjunction with the PSD power management unit (PMU) to reduce power consump-
tion.
The code examples that follow demonstrate how the PSD I/O ports are accessed in comparison with
M68HC11 I/O ports. Access to the other PSD control registers is achieved in the same straightforward fash-
ion. Please refer to PSD4XX and PSD5XX documentation for more information.
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| MC68HC11K1CFN2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K1CFN3 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC11K1CFN4 | 功能描述:IC MCU 640 EEPROM 4MHZ 84-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 其它有關文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標準包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 10x12b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68HC11K1CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 768 RAM - EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| MC68HC11K1CFNE4 | 功能描述:8位微控制器 -MCU 8B MCU 768 RAM - EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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