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參數(shù)資料
| 型號： | MC68HC11K1 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller(8位微控制器) |
| 中文描述： | 8位微控制器（8位微控制器） |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 286K |
| 代理商： | MC68HC11K1 |
AN1242/D
MOTOROLA
15
5. Generate A Schematic For The Combined System
Table 3
shows the connections between a non-multiplexed bus M68HC11 and a PSD4XX or PSD5XX
An expansion address line (XA14) could be connected to one of the PSD Port A inputs, and used to select
the 16 Kbyte LCD table EPROM pages. In the example application, however, it is easier to use the PSD
page register. The four page register bits (PG[3:0]) can be used as inputs to the DPLD. In the example PS-
Dabel listing, the ES0 and ES1 EPROM chip selects are decoded when the page register value is $0 or
$1 and the CPU address is between $4000 and $7FFF.
The page register is accessed as follows.
REGBASE equ $2800
PSD_PAGE equ $E0
PAGE0 equ $00
PAGE1 equ $01
LCD_LINE1 equ $4000
LINE_LEN equ $F0
*
* select EPROM page 0/LCD table 0
*
ldaa #PAGE0
staa REGBASE + PSD_PAGE
*
* read data from selected page
*
ldx #LCD_LINE1
ldab #LINE_LEN
SEND_L1 ldaa 0,X
jsr SEND_DATA
inx
decb
bne SEND_L1
.
. etc.
.
The page register bits are available as inputs to both the DPLD and the GPLD. In fact, the DPLD can gen-
erate two additional chip selects called PSEL0 and PSEL1 that can be used to connect other peripheral de-
vices to the combined system. Using the page register, these devices could be mapped into the $4000 to
$7FFF range used for EPROM blocks 0 and 1. If a more complex decoding function is needed, the GPLD
and its associated macrocells can be used.
Table 3 M68HC11 to PSD Connections
M68HC11
ADDR[15:0]
DATA[7:0]
E
R/W
PSD4XX or PSD5XX
ADIO[15:0]
PC[7:0]
RD
WR
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| MC68HC11K1CFNE3 | 功能描述:8位微控制器 -MCU 8B MCU 768 RAM - EPP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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