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參數(shù)資料
| 型號： | MC68HC11K1 |
| 廠商： | Motorola, Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller(8位微控制器) |
| 中文描述： | 8位微控制器（8位微控制器） |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 286K |
| 代理商： | MC68HC11K1 |
MOTOROLA
12
AN1242/D
4. Determine Which PSD I/O Ports Replace M68HC11 I/O Ports
PSD4XX and PSD5XX devices have five 8-bit I/O ports, labeled A, B, C, D, and E. When used with a non-
multiplexed bus M68HC11, Port C becomes the 8-bit data bus. Of the available 32 bits of general purpose
I/O, 24 are used to rebuild M68HC11 Ports B, C, and F (the address/data bus), and the remaining 8 can be
used to rebuild Port G bit 7 (the R/W line) and other Port G or Port H I/O pins used for expansion address
lines or chip selects.
To modify existing single-chip M68HC11 software to take advantage of PSD I/O ports, simply substitute
PSD register addresses for HC11 register addresses. A typical M68HC11 I/O port has both a data direction
register and a port data register. Every PSD I/O port has a control register that determines port function, a
data direction register, a data in register, and a data out register. Some PSD I/O ports also have registers
to enable open drain operation, to determine if a pin is used as a PLD signal or I/O bit, and to read the out-
puts of the GPLD.
A good way to view the port relationships between a PSD and an M68HC11 is to construct a table that lists
each port and its associated registers. On one side of the table, list the M68HC11 I/O port and its registers,
and on the other side, list the equivalent PSD I/O port and its registers. Use this table as a guide when mod-
ifying single-chip firmware to support the two chip M68HC11/PSD system.
for the example application. Remember that CSIOP is mapped from $2800 to $28FF.
Table 2
is an I/O mapping table
As
address specified in the PSDabel file. The PSD4XX and PSD5XX documentation lists these 8-bit offsets.
Table 2
indicates, the location of each PSD register is specified as an 8-bit offset from the CSIOP base
Table 2 M68HC11 to PSD I/O Conversion Table
MC68HC711K4
DDRB
PORTB
PSD412A1
PB_DDR
PB_INDATA
PB_OUTDATA
PB_CONTROL
PB_PLD_IO
PB_MAC_OUT
PA_DDR
PA_INDATA
PA_OUTDATA
PA_CONTROL
PA_PLD_IO
PA_MAC_OUT
PE_DDR
PE_INDATA
PE_OUTDATA
PE_CONTROL
PE_PLD_IO
PE_MAC_OUT
Port B
$0002
$0004
Port B
$2807
$2801
$2805
$2803
$280B
$280D
$2806
$2800
$2804
$2802
$280A
$280C
$2826
$2820
$2824
$2822
$282A
$282C
Port C
DDRC
PORTC
$0007
$0006
Port A
Port F
DDRF
PORTF
$0003
$0005
Port E
Occupied
Port G/H
I/O
DDRG/H
$007F
or
$007D
$007E
or
$007D
Port D
PD_DDR
$2817
PORTG/H
PD_INDATA
$2811
PD_OUTDATA
PD_CONTROL
PD_OPN_DRN
$2815
$2813
$2819
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