
Central Processor Unit (CPU)
Instruction Set
M68HC11E Family — Rev. 5
Data Sheet
MOTOROLA
Central Processor Unit (CPU)
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83
CMPA (opr)
Compare A to 
Memory
A – M
A
A
A
A
A
B
B
B
B
B
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
EXT
IND,X
IND,Y
INH
81
91
 B1
A1
A1
C1
D1
 F1
E1
E1
73
63
63
43
18
ii
dd
hh  ll
ff
ff
ii
dd
hh  ll
ff
ff
hh  ll
ff
ff
2
3
4
4
5
2
3
4
4
5
6
6
7
2
—
—
—
—
CMPB (opr)
Compare B to 
Memory
B – M
18
—
—
—
—
COM (opr)
Ones 
Complement 
Memory Byte
Ones 
Complement 
A
Ones 
Complement 
B
Compare D to 
Memory 16-Bit
$FF – M 
 M
18
—
—
—
—
0
1
COMA
$FF – A 
 A
A
—
—
—
—
—
0
1
COMB
$FF – B 
 B
B
INH
53
—
2
—
—
—
—
0
1
CPD (opr)
D – M : M  + 1
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
1A
1A
1A
1A
CD
83
93
B3
A3
A3
8C
9C
 BC
AC
AC
8C
9C
BC
AC
AC
19
jj  kk
dd
hh  ll
ff
ff
jj  kk
dd
hh  ll
ff
ff
jj  kk
dd
hh  ll
ff
ff
5
6
7
7
7
4
5
6
6
7
5
6
7
7
7
2
—
—
—
—
CPX (opr)
Compare X to 
Memory 16-Bit
IX – M : M + 1
CD
18
18
18
1A
18
—
—
—
—
CPY (opr)
Compare Y to 
Memory 16-Bit
IY – M : M + 1
—
—
—
—
DAA
Decimal Adjust 
A
Decrement 
Memory Byte
Adjust Sum to BCD
—
—
—
—
—
DEC (opr)
M – 1 
 M
EXT
IND,X
IND,Y
INH
7A
6A
6A
4A
18
hh  ll
ff
ff
6
6
7
2
—
—
—
—
—
DECA
Decrement 
Accumulator 
A
Decrement 
Accumulator 
B
Decrement 
Stack Pointer 
Decrement 
Index Register 
X
Decrement 
Index Register 
Y
Exclusive OR A 
with Memory
A – 1 
 A
A
—
—
—
—
—
—
DECB
B – 1 
 B
B
INH
5A
—
2
—
—
—
—
—
DES
SP – 1 
 SP
INH
34
—
3
—
—
—
—
—
—
—
—
DEX
IX – 1 
 IX
INH
09
—
3
—
—
—
—
—
—
—
DEY
IY – 1 
 IY
INH
18
09
—
4
—
—
—
—
—
—
—
EORA (opr) 
A 
⊕
 M 
 A
A
A
A
A
A
B
B
B
B
B
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
88
98
 B8
A8
A8
C8
D8
 F8
E8
E8
03
18
ii
dd
hh  ll
ff
ff
ii
dd
hh  ll
ff
ff
2
3
4
4
5
2
3
4
4
5
41
—
—
—
—
0
—
EORB (opr)
Exclusive OR B 
with Memory
B 
⊕
 M 
 B
18
—
—
—
—
0
—
FDIV
Fractional 
Divide 16 by 16
Integer Divide 
16 by 16
D / IX 
 IX; r 
 D
—
—
—
—
—
—
IDIV
D / IX 
 IX; r 
 D
INH
02
—
41
—
—
—
—
—
0
Table 4-2. Instruction Set  (Sheet 3 of 7)
Mnemonic
Operation
Description
Addressing
Mode 
Instruction
Operand
Condition Codes
H
I
Opcode
Cycles
S
X
N
Z
V
C
F
Freescale Semiconductor, Inc.
n
.