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參數(shù)資料
| 型號(hào)： | MC68HC11D3CFN2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 109/138頁 |
| 文件大小： | 1047K |
| 代理商： | MC68HC11D3CFN2 |
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Serial Communications Interface (SCI)
MC68HC711D3 Data Sheet, Rev. 2.1
72
Freescale Semiconductor
IDLE — Idle Line Detected Flag
This flag is set if the RxD line is idle. Once cleared, IDLE is not set again until the RxD line has been
active and becomes idle again. The IDLE flag is inhibited when RWU = 1. Clear IDLE by reading SCSR
with IDLE set and then reading SCDR.
0 = RxD line active
1 = RxD line idle
OR — Overrun Error Flag
OR is set if a new character is received before a previously received character is read from SCDR.
Clear the OR flag by reading SCSR with OR set and then reading SCDR.
0 = No overrun
1 = Overrun detected
NF — Noise Error Flag
NF is set if majority sample logic detects anything other than a unanimous decision. Clear NF by
reading SCSR with NF set and then reading SCDR.
0 = Unanimous decision
1 = Noise detected
FE — Framing Error Bit
FE is set when a 0 is detected where a stop bit was expected. Clear the FE flag by reading SCSR with
FE set and then reading SCDR.
0 = Stop bit detected
1 = Zero detected
6.7.5 Baud Rate Register
The baud rate register (BAUD) is used to select different baud rates for the SCI system. The SCP1 and
SCP0 bits function as a prescaler for the SCR2–SCR0 bits. Together, these five bits provide multiple baud
rate combinations for a given crystal frequency. Normally, this register is written once during initialization.
The prescaler is set to its fastest rate by default out of reset and can be changed at any time. Refer to
TCLR — Clear Baud Rate Counters (Test)
RCKB — SCI Baud Rate Clock Check (Test)
Address:
$002B
Bit 7
654321
Bit 0
Read:
TCLR
0
SCP1
SCP0
RCKB
SCR2
SCR1
SCR0
Write:
Reset:
00000
U
U = Unaffected
Figure 6-7. Baud Rate Register (BAUD)
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