MC68HC11A8
TECHNICAL DATA
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
10-21
10
Table 10-7 Cycle-by-Cycle Operation — Indexed Y Mode (Sheet 1 of 2)
Reference
Number*
7-1
Address Mode
and Instructions
JMP
Cycles Cycle
#
1
Address Bus
R/W
Line
1
Data Bus
4
2
3
4
1
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
Opcode Address
1
1
1
1
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($6E)
Index Offset
Irrelevant Data
Opcode (Page Select Byte)
($18)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data
7-2
ADCA, ADCB, ADDA,
ADDB, ANDA ANDB,
BITA, BITB, CMPA,
CMPB, EORA, EORB,
LDAA, LDAB, ORAA,
ORAB, SBCA, SBCB,
SUBA, SUBB,
ASL, ASR, CLR,
COM, DEC, INC,
LSL, LSR, NEG,
ROL, ROR
5
2
3
4
5
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
1
1
1
1
7-3
7
1
2
3
4
5
6
7
1
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
$FFFF
(IY) + Offset
Opcode Address
1
1
1
1
1
1
0
1
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Original Operand Data
Irrelevant Data
Result Operand Data
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($6D)
Index Offset
Irrelevant Data
Original Operand Data
Irrelevant Data
Irrelevant Data
Opcode (Page Select Byte)
($18)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Accumulator Data
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data (High Byte)
Operand Data (Low Byte)
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Register Data (High Byte)
Register Data (Low Byte)
Opcode (Page Select Byte)
Opcode (Second Byte)
Index Offset
Irrelevant Data
Operand Data (High Byte)
Operand Data (Low Byte)
Irrelevant Data
7-4
TST
7
2
3
4
5
6
7
1
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
$FFFF
$FFFF
Opcode Address
1
1
1
1
1
1
1
7-5
STAA, STAB
5
2
3
4
5
1
2
3
4
5
6
1
2
3
4
5
6
1
2
3
4
5
6
7
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
(IY) + Offset
(IY) + Offset + 1
$FFFF
1
1
1
0
1
1
1
1
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
7-6
LDD, LDS, LDX,
LDY
6
7-7
STD, STS, STX,
STY
6
7-8
ADDD, CPD, CPX,
CPY, SUBD
7
* The reference number is given to provide a cross-reference to Table 10-1.