MOTOROLA
10-4
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MC68HC11A8
TECHNICAL DATA
10
dicate the address in memory from which the argument is fetched or stored, or from
which execution is to proceed.
10.2.1 Immediate Addressing
In the immediate addressing mode, the actual argument is contained in the byte(s) im-
mediately following the instruction, where the number of bytes matches the size of the
register. These are two, three, or four (if prebyte is required) byte instructions.
10.2.2 Direct Addressing
In the direct addressing mode (sometimes called zero page addressing), the least sig-
nificant byte of the operand address is contained in a single byte following the opcode
and the most significant byte is assumed to be $00. Direct addressing allows the user
to access $0000 through $00FF using two byte instructions and execution time is re-
duced by eliminating the additional memory access. In most applications, this 256-
byte area is reserved for frequently referenced data. In the MC68HC11A8, software
can configure the memory map so that internal RAM, and/or internal registers, or ex-
ternal memory space can occupy these addresses.
10.2.3 Extended Addressing
In the extended addressing mode, the second and third bytes (following the opcode)
contain the absolute address of the operand. These are three or four (if prebyte is re-
quired) byte instructions: one or two for the opcode, and two for the effective address.
10.2.4 Indexed Addressing
In the indexed addressing mode, one of the index registers (X or Y) is used in
calculating the effective address. In this case, the effective address is variable
and depends on two factors: 1) the current contents of the index register (X or
Y) being used, and 2) the 8-bit unsigned offset contained in the instruction.
This addressing mode allows referencing any memory location in the 64 Kbyte
address space. These are usually two or three (if prebyte is required) byte in-
structions, the opcode plus the 8-bit offset.
10.2.5 Inherent Addressing
In the inherent addressing mode, all of the information is contained in the opcode. The
operands (if any) are registers and no memory reference is required. These are usu-
ally one or two byte instructions.
10.2.6 Relative Addressing
The relative addressing mode is used for branch instructions. If the branch condition
is true, the contents of the 8-bit signed byte following the opcode (the offset) is added
to the contents of the program counter to form the effective branch address; otherwise,
control proceeds to the next instruction. These are usually two byte instructions.