參數(shù)資料
型號(hào): MC68HC08RC16DW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 21/200頁(yè)
文件大?。?/td> 1856K
代理商: MC68HC08RC16DW
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Carrier Modulator Transmitter (CMT)
Overview
MC68HC08RC16 — Rev. 1.0
Technical Data
MOTOROLA
Carrier Modulator Transmitter (CMT)
117
For example, an 800-kHz signal has a period of 1.25
s and will
therefore require 5 x 250 ns counts to generate. These counts may be
split between high and low times so the duty cycles available will be:
20 percent (one high, four low)
40 percent (two high, three low)
60 percent (three high, two low)
80 percent (four high, one low)
For lower frequency signals with larger periods, higher resolution (as a
percentage of the total period) duty cycles are possible.
When the BASE bit in the CMT modulator control and status register
(CMCS) is set, the carrier output to the modulator is held high
continuously to allow for the generation of baseband protocols.
A third mode allows the carrier generator to alternate between two sets
of high and low times. When operating in FSK mode, the generator will
toggle between the two sets when instructed by the modulator, allowing
the user to dynamically switch between two carrier frequencies without
CPU intervention.
The modulator provides a simple method to control protocol timing. The
modulator has a resolution of 2
s with an 8-MHz oscillator. It can count
system clocks (to provide real-time control) or it can count carrier clocks
(for self-clocked protocols). See 12.6 Modulator for more details.
The transmitter output block controls the state of the infrared out pin
(IRO). The modulator output is gated on to the IRO pin when the
modulator/carrier generator is enabled. When the module is not
enabled, the IRO pin is controlled by the state of the IRO latch. A polarity
bit enables the IRO pin to be high true or low true. See 12.8 IRO Latch.
A summary of the possible modes is shown in Table 12-2.
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