參數(shù)資料
型號(hào): MC68HC05X4CDWR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 55/168頁
文件大?。?/td> 656K
代理商: MC68HC05X4CDWR2
Index
MC68HC05X4 Rev 1.0
148
Index
MOTOROLA
RIF – receive interrupt flag. . . . . . . . . . .87
TIF – transmit interrupt flag . . . . . . . . . .87
WIF – wake-up interrupt flag . . . . . . . . .86
clocks
ceramic resonator . . . . . . . . . . . . . . . . .26
crystal. . . . . . . . . . . . . . . . . . . . . . . . . . .25
external . . . . . . . . . . . . . . . . . . . . . . . . .26
OSC1/OSC2 . . . . . . . . . . . . . . . . . . . . .25
oscillator connections
. . . . . . . . . . . . . . .26
COCNTRL — MCAN output control register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
OCM1, OCM0 – output control mode bits
. . . . . . . . . . . . . . . . . . . . . . . . . .94
COMPSEL bit in CCOM . . . . . . . . . . . . . . .81
computer operating properly . . . . . . . . . . . .51
condition code register (CCR) . . . . . . . . . . .32
control instructions . . . . . . . . . . . . . . . . . . .41
COP. . . . . . . . . . . . . . . . . . . . . . . . . . .51, 107
COP bit in MOR. . . . . . . . . . . . . . . . . . . . . .12
core timer
block diagram
. . . . . . . . . . . . . . . . . . . .106
CTCR . . . . . . . . . . . . . . . . . . . . . . . . . .110
CTCSR. . . . . . . . . . . . . . . . . . . . . . . . .108
during STOP mode . . . . . . . . . . . . . . .110
during WAIT mode . . . . . . . . . . . . . . . .110
interrupts . . . . . . . . . . . . . . . . . . . . . . . .54
COS bit in CCOM . . . . . . . . . . . . . . . . . . . .82
counter – see programmable timer . . . . . .114
crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
CSTAT — MCAN status register. . . . . . . . .84
BS – bus status bit . . . . . . . . . . . . . . . . .84
DO – data overrun bit. . . . . . . . . . . . . . .85
ES – error status bit . . . . . . . . . . . . . . . .84
RBS – receive buffer status bit . . . . . . .86
RS – receive status bit . . . . . . . . . . . . . .84
TBA – transmit buffer access bit . . . . . .85
TCS – transmission complete status bit.85
TS – transmit status bit . . . . . . . . . . . . .84
CTCR — core timer counter register. . . . .110
CTCSR — core timer control/status register
. . . . . . . . . . . . . . . . . . . . . . . . . . . .108
CTOF – core timer overflow flag . . . . .108
CTOFE – core timer overflow interrupt
enable bit . . . . . . . . . . . . . . . . . 109
RCTOF – reset core timer overflow flag
. . . . . . . . . . . . . . . . . . . . . . . . . . . .109
RT1, RT0 – real time interrupt rate select
bits . . . . . . . . . . . . . . . . . . . . . . 109
RTIE – real time interrupt enable bit . . 109
RTIF – real time interrupt flag . . . . . . . 108
CTIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
CTOF bit in CTCSR . . . . . . . . . . . . . . . . . 108
CTOFE bit in CTCSR . . . . . . . . . . . . . . . . 109
D
data retention mode . . . . . . . . . . . . . . . . . . 56
DB7–DB0 bits in TDS . . . . . . . . . . . . . . . . . 98
direct addressing mode. . . . . . . . . . . . . . . . 35
DIV2 bit in MOR . . . . . . . . . . . . . . . . . . . . . 12
DLC3–DLC0 bits in TRTDL. . . . . . . . . . . . . 97
DO bit in CSTAT . . . . . . . . . . . . . . . . . . . . . 85
E
EIE bit in CCNTRL . . . . . . . . . . . . . . . . . . . 79
EIF bit in CINT . . . . . . . . . . . . . . . . . . . . . . 87
ELAT bit in EPROG . . . . . . . . . . . . . . . . . . 20
EPGM bit in EPROG. . . . . . . . . . . . . . . . . . 20
EPROG — EPROM programming register .20
ELAT . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
EPGM . . . . . . . . . . . . . . . . . . . . . . . . . . 20
EPROM
EPROG — EPROM programming register
. . . . . . . . . . . . . . . . . . . . . . . . . . 20
submitting for pattern generation. . . . . 135
ES bit in CSTAT . . . . . . . . . . . . . . . . . . . . . 84
extended addressing mode. . . . . . . . . . . . . 35
external clock . . . . . . . . . . . . . . . . . . . . . . . 26
F
flowcharts
MC68HC05X4 bootloader mode . . . . . . 19
MC68HC705X4 bootloader mode
. . . . . 23
free-running counter . . . . . . . . . . . . . . . . . 115
H
half-carry flag . . . . . . . . . . . . . . . . . . . . . . . 32
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