參數(shù)資料
型號: MC68HC05X4CDWR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 157/168頁
文件大小: 656K
代理商: MC68HC05X4CDWR2
Motorola CAN
Interface to the MC68HC05X4 CPU
MC68HC05X4 Rev 1.0
MOTOROLA
Motorola CAN
89
21-mcan
MCAN bus timing
register 1 (CBT1)
This register can only be accessed only when the RR bit in CCNTRL is
set.
SAMP — Sampling
This bit determines the number of samples of the serial bus to be
taken per bit time. When set three samples per bit are taken. This
sample rate gives better rejection of noise on the bus, but introduces
a one bit delay to the bus sampling. For higher bit rates SAMP should
be cleared, which means that only one sample will be taken per bit.
1 = Three samples per bit.
0 = One sample per bit.
TSEG22 – TSEG10 — Time segment bits
Time segments within the bit time fix the number of clock cycles per
bit time, and the location of the sample point.
Figure 11. Oscillator block diagram
OSC1
fosc
fosc/2
fOP
MCU bus clock
MCAN module system clock
tSCL =
fosc
2P
Divide by
2
Divide by
10 or 2
Prescaler (P)
Address:
$0027
Bit 7
654321
Bit 0
SAMP
TSEG22
TSEG21
TSEG20
TSEG13
TSEG12
TSEG11
TSEG10
Reset:
Undened
Figure 12. MCAN Bus Timing 1 (CBT1)
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