MOTOROLA
Page ix
MC68HC05V7 Specification Rev. 1.0
LIST OF FIGURES
Figure 1-1:
MC68HC05V7 Pin Assignments (56 pin package)................................3
Figure 1-2:
MC68HC05V7 Pin Assignments (68-pin PLCC package) .....................4
Figure 1-3:
MC68HC05V7 Pin Assignments (64-pin QFP)......................................5
Figure 1-4:
MC68HC05V7 Bonding Diagram Circuit Side Up..................................6
Figure 1-5:
MC68HC05V7 Bonding Diagram Circuit Side Down .............................7
Figure 1-6:
MC68HC05V7 Block Diagram ...............................................................8
Figure 1-7:
Oscillator Connections.........................................................................10
Figure 2-1:
MC68HC05V7 Single-Chip Mode Memory Map.................................13
Figure 2-2:
MC68HC05V7 I/O Registers Memory Map .........................................14
Figure 2-3:
MC68HC05V7 I/O Registers $0000-$000F .........................................16
Figure 2-4:
MC68HC05V7 I/O Registers $0010-$001F .........................................17
Figure 2-5:
MC68HC05V7 I/O Registers $0020-$002F .........................................18
Figure 2-6:
MC68HC05V7 I/O Registers $0030-$003F .........................................19
Figure 3-1:
Programming Register.........................................................................21
Figure 4-1:
MC68HC05 Programming Model ........................................................25
Figure 5-1:
Interrupt Processing Flowchart............................................................31
Figure 5-2:
IRQ Function Block Diagram ...............................................................33
Figure 5-3:
IRQ Status & Control Register.............................................................35
Figure 5-4:
External Interrupts Timing Diagram.....................................................37
Figure 6-1:
Reset Block Diagram...........................................................................39
Figure 6-2:
RESET and POR Timing Diagram ......................................................41
Figure 6-3:
COP Watchdog Timer Location...........................................................43
Figure 7-1:
Miscellaneous Register .......................................................................46
Figure 7-2:
MC68HC05V7 Power Moding Flow Diagram ......................................48
Figure 7-3:
Regulator Startup ................................................................................49
Figure 7-4:
Using the 68HC05V7 with an External Regulator................................51
Figure 7-5:
Power Moding Block Diagram .............................................................52
Figure 7-6:
MC68HC05V7 On-chip Power Supply Configuration ..........................53
Figure 7-7:
HC705V8 Internal Power Routing .......................................................54
Figure 8-1:
Stop Recovery Timing Diagram...........................................................58
Figure 8-2:
STOP/WAIT Flowcharts.......................................................................59