
AN1257/D
MOTOROLA
5
Voltage Regulator Output
As described in POWER SUPPLY ARCHITECTURE, in addition to supplying 5 volts to the digital circuitry
of the MCU internally, the output of the on-chip voltage regulator is connected to the two V
DD
pins (pins 30
and 4) of the MCU to allow external stabilization and decoupling of the power supply output. To ensure a
stable 5-volt supply from the primary voltage regulator on the MC68HC705V8 and MC68HC05V7, a 10
μ
F
tantalum or electrolytic bulk capacitor should be connected between pins 30 and 31 (V
DD
and V
SSD
,
respectively). This capacitor should be placed between this pair of V
DD
/V
SSD
pins since they are physically
closer to the output of the voltage regulation circuit on the device than the other pair of V
DD
/V
SSD
pins (pins
4 and 3, respectively). This capacitor should be positioned as close to the V
DD
/V
SS
pins as possible to
maximize its effect.
High frequency decoupling capacitors (ceramic or polystyrene) should be placed between both pairs of
V
DD
/V
SSD
pins, also positioned as close to the MCU as possible (even closer than the bulk capacitor at pins
30 and 31). These are necessary to help reduce radiated RF emissions as well as to reduce high
frequency noise on the 5-volt supply. The example in Figure 2 has .1
μ
F capacitors between each pair of
V
DD
/V
SSD
pins for external decoupling. Because pin 4 is connected internally to the output of the primary
voltage regulator through a resistance of approximately 40
and the inductance of the bond wire at each
pin is approximately 4 nH, the self-resonance of the decoupling network between pins 3 and 4 may be too
low. In this case, a smaller capacitor (470
ρ
F to .01
μ
F) can be added in parallel to the .1
μ
F between these
pins to increase the bandwidth of the decoupling network. If so, the smaller capacitor should be placed
closest to the MCU.
Remember: The farther these capacitors are from the MCU pins, the less effect
they will have in reducing electrical noise in the system
.
The V
SSD
pins should be connected in the application to ensure an adequate low-impedance ground return
for the system. The effect of not connecting the V
DD
pins is not yet known, and it is currently recommended
that they be connected as well.
In the example circuit in Figure 2, the 5 volts available from the V
DD
pins are connected to the V
CCA
pin (pin
40) to supply 5 volts to the analog circuitry. In both the MC68HC705V8 and the MC68HC05V7, the analog
and digital supplies are not connected internally, so the 5 volts for the analog circuitry must be supplied
externally. As with any externally supplied power source, an appropriate decoupling capacitor has been
placed between V
CCA
and the adjacent A/D subsystem analog ground return (V
SSA
1
, pin 41). A separate
ground return (V
SSA
2
, pin 22) is provided for the SAE J1850 analog subsystem.
To power additional external circuitry from the on-chip regulator, either of the V
DD
pins can be used as the
source of 5 volts. However, when possible, the V
DD
pin closest to the on-chip regulator (pin 30) should be
used as a 5-volt source for external components. This improves the regulator's response to the additional
fluctuations in the 5-volt supply loading caused by supplying the external components.
Also shown in Figure 2 is a simple power-on reset (POR) circuit connected to the reset pin (RST, pin 7) to
provide a time delay between full activation of the primary regulator and external release of the RST pin.
Although an external POR circuit is not required when the LVR mask option is selected, it does allow time
for the V
DD
supply to stabilize before the RST pin is released externally. If the LVR option is not selected,
the user should certainly consider some sort of external POR/LVR circuitry to prevent unpredictable
operation during power-up, power-down, and brown-out situations.