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參數(shù)資料
| 型號： | MC68HC05V7 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 295K |
| 代理商： | MC68HC05V7 |
MOTOROLA
10
AN1257/D
The power-down control bit (PDC, bit 0) in the MISC register is used to put the primary regulator into the
power-conserving standby mode whenever it is determined that the MCU should enter a low-power state.
Whenever a logic zero is written to the PDC bit, the primary regulator immediately will enter standby mode
and the active V
DD
to V
SSD
clamp will be enabled, if that mask option is selected. A logic zero can be written
to the PDC bit at any time, regardless of the current level of the V
IGN
pin or BUS pin. Writing a logic one to
the PDC bit while the primary voltage regulator is enabled will have no effect on the operation of the
primary regulator.
NONOTE
While writing a logic one to the PDC bit when the primary regulator is enabled will have no
effect on regulator operation, it is highly recommended that the user do so after the primary
regulator exits standby mode. Since this bit is not automatically set to a logic one when the
primary regulator is enabled, doing so in software will ensure that any subsequent
read/modify/write instructions involving other MISC register bits will not inadvertently put
the primary regulator into standby mode by reading and then writing a logic zero to the PDC
bit. Any full byte writes to the MISC register should, of course, have a logic one in the PDC
bit position, if the user does not wish the primary regulator to be put into standby mode.
The ignition sense bit (IGNS, bit 7) in the MISC register is a read-only bit which simply reflects the state of
the V
IGN
pin. For example, in automotive “switched battery” applications where the 12-volt supply to the
V
BATT
pin is always available but the 12-volt supply to the V
IGN
pin is switched by the vehicle ignition, the
IGNS bit can be read by the CPU to determine when the automobile's ignition has been switched off. Since
there is no hysteresis or digital filtering on the V
IGN
pin, the user should utilize software filtering to verify that
changes in the state of the V
IGN
pin are not caused by transients on the switched 12-volt supply line. For
more information on the operation of the V
IGN
pin, refer to the Voltage Regulator Input section. As long as
the supply voltage at the V
BATT
pin is above the specified minimum operating voltage, the IGNS bit will
reflect the level of the V
IGN
pin, regardless of whether the REGEN mask option has been selected.
POWER SUPPLY OPERATION
The software necessary for correct operation of the on-chip voltage regulator is minimal. Once the user
has selected the desired external circuitry and MCU mask options, the only remaining software tasks are
to initialize the regulator following power-up, put the primary regulator into standby mode when desired,
and reinitialize the regulator once standby mode is exited.
The following operational descriptions are based on the example in Figure 2. In this example circuit, the
V
BATT
pin of the MC68HC705V8 is connected directly to the vehicle battery, the V
IGN
pin is connected to
switched battery, and the BUS pin is connected to the SAE J1850 serial communication network. The
mask options selected for the following descriptions include the on-chip voltage regulator enabled (REGEN
set), LVR circuit enabled (LVR set), V
DD
to V
SSD
clamp enabled when primary regulator disabled (VDDC
set), and primary regulator enabled on a rising edge on the SAE J1850 network (MDLCPU set).
Voltage Regulator Initialization
In the example circuit in Figure 2, once the vehicle battery voltage applied to the V
BATT
pin reaches the
minimum specified operating level, the secondary voltage regulator will be enabled immediately and the
primary regulator will enter the standby mode. The primary regulator will remain in the standby mode until
either a rising edge (caused by the vehicle ignition being switched on) is detected at the V
IGN
pin or activity
on the SAE J1850 network is detected at the BUS pin. Once either of these events occurs, the primary
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