參數(shù)資料
型號: MC68HC05P9DWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 44/88頁
文件大?。?/td> 6557K
代理商: MC68HC05P9DWR2
6
MC68HC05E0
MOTOROLA
6-1
PARALLEL INPUT/OUTPUT PORTS
6
PARALLEL INPUT/OUTPUT PORTS
6.1
Bidirectional Ports
Ports A, B, C, and D are bidirectional 8-bit ports and Port E is a 4-bit bidirectional port and may be
congured as inputs or outputs under software control. The Port E lines are associated with bits
0–3 in the Port E data and data direction registers. The direction of any port line is determined by
the state of the corresponding bit in the data direction register (DDR). Any port line is congured
as an output if its corresponding DDR bit set to a logic one. A pin is congured as an input if its
DDR bit is cleared to a logic zero. At power-on or reset, all DDRs are cleared to $00 (with the
exception of DDRE which is set to $F0), which congures all I/O lines as inputs. (Note that, on
reset, bit 0 of the Port D Mode register is set to one, thereby forcing Port D bit 0 to output the P02
clock signal.) All data and data direction registers can be written to and read by the CPU. Refer to
53
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