參數(shù)資料
型號(hào)： MC68HC05E1MDW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 76/86頁
文件大小： 491K
代理商： MC68HC05E1MDW
General Release Specication
MC68HC05E1 — Revision 2.0
78
Electrical Specifications
MOTOROLA
Electrical Specications
7.8 5.0-Volt Control Timing
7.9 3.3-Volt Control Timing
Characteristic
Symbol
Min
Max
Unit
Frequency of Operation
Crystal Oscillator Option
External Clock Option
fosc
—
DC
32.768
4.2
kHz
MHz
Internal Operating Frequency
Crystal Oscillator (f
OSC ÷ 2)
External Clock (f
OSC ÷ 2)
fop
—
DC
16.384
2.1
kHz
MHz
Cycle Time
tcyc
480
—
ns
RESET Pulse Width
tRL
1.5
—
tcyc
Interrupt Pulse Width Low (Edge-Triggered) (see Figure 7-1)tILIH
125
—
ns
Interrupt Pulse Period (see Figure 7-1)tILIL
Note 2
—
tcyc
OSC1 Pulse Width
tOH, tOL
90
—
ns
PLL Startup Stabilization Time
tPLLS
50
—
ms
NOTES:
1. VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = 0 °C to 70 °C, unless otherwise note
2. The minimum period, tILIL, should not be less than the number of cycles it takes to execute the interrupt service routine
plus 19 tcyc.
Characteristic
Symbol
Min
Max
Unit
Frequency of Operation
Crystal Oscillator Option
External Clock Option
fosc
—
DC
32.768
2.1
kHz
MHz
Internal Operating Frequency
Crystal Oscillator (f
OSC ÷ 2)
External Clock (f
OSC ÷ 2)
fop
—
DC
16.384
1.0
kHz
MHz
Cycle Time
tcyc
1000
—
ns
RESET Pulse Width
tRL
1.5
—
tcyc
Interrupt Pulse Width Low (Edge-Triggered) (see Figure 7-1)tILIH
250
—
ns
Interrupt Pulse Period (see Figure 7-1)tILIL
Note 2
—
tcyc
OSC1 Pulse Width
tOH, tOL
200
—
ns
PLL Startup Stabilization Time
tPLLS
100
—
ms
NOTES:
1. VDD = 3.3 Vdc ± 10%, VSS = 0 Vdc, TA = 0 °C to 70 °C, unless otherwise note
2. The minimum period, tILIL, should not be less than the number of cycles it takes to execute the interrupt service routine
plus 19 tcyc.
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