參數(shù)資料
型號(hào): MC68HC05E1MDW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 16/86頁(yè)
文件大?。?/td> 491K
代理商: MC68HC05E1MDW
Operating Modes
Self-Check Mode
MC68HC05E1 — Revision 2.0
General Release Specication
MOTOROLA
Operating Modes
23
Figure 2-2. Self-Check Circuit Schematic Diagram
The Self-Check Mode is entered on the rising edge of RESET if the IRQ
pin is at VTST, and the PB1 pin is at logic one. RESET must be held low
for 4064 cycles after POR, or for a time tRL for any other reset. After
reset, the PLL is turned on (fop = 1.049 MHz) and the following tests are
performed automatically:
1.
I/O – Functionally exercises ports A, B, and C
2. RAM – Counter test for each page zero RAM byte
3. Timer/CPI – Tracks counter register and checks TOF and RTIF
flags
4. ROM – Exclusive OR with odd ones parity result
5. Interrupts –Tests external interrupts, RTI and CPI
10 pf
20 M
1
2
3
4
5
6
7
8
9
10
19
20
21
22
23
24
25
26
27
28
IRQ
RESET
PB4
PB3
PB2
PB1
PB0
VDD
VSS
PB5
32.768 kHz
10 pf
10 k
10 k
4.7 k
2N3904
V
TST
11
12
13
14
15
16
17
18
PB7
PB6
1 k
V
TST
= 2 X V
DD
OSC1
OSC2
1
f
10 K
V
DD
0.1
f
V
DD
V
DDSYN
330 k
PC3
XFC
VDDSYN
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC0
PC1
PC2
0.1
f
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