- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45220 > MC68HC05E1MDW (MOTOROLA INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC05E1MDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁(yè)數(shù)： | 61/86頁(yè) |
| 文件大?。?/td> | 491K |
| 代理商： | MC68HC05E1MDW |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)當(dāng)前第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)
General Release Specication
MC68HC05E1 — Revision 2.0
64
Timer, Phase-Locked Loop, and Custom Periodic Interrupt
MOTOROLA
Timer, Phase-Locked Loop, and Custom Periodic
6.4 Phase-Locked Loop Synthesizer
The phase-locked loop (PLL) consists of a variable bandwidth loop filter,
a voltage controlled oscillator (VCO), a feedback frequency divider, and
a digital phase detector. The PLL requires an external loop filter
capacitor (typically 0.1 uf) connected between XFC and VDDSYN. This
capacitor should be located as close to the chip as possible to minimize
noise. VDDSYN is the supply source for the PLL and should be bypassed
to minimize noise. The VDDSYN bypass cap should be as close as
possible to the chip.
Figure 6-4. PLL Circuit
The phase detector compares the frequency and phase of the feedback
frequency (tFB) and the crystal oscillator reference frequency (tREF) and
generates the output, PCOMP, as shown in Figure 6-4. The output
wave-form is then integrated and amplified. The resultant dc voltage is
applied to the voltage controlled oscillator. The output of the VCO is
divided by a variable frequency divider of 256, 128, 64, or 32 to provide
the feedback frequency for the phase detector.
loop filter
VCO
Phase
PCOMP
PLLOUT
Frequency
Divider
t
FB
OSC1
XFC
Crystal
Oscillator
PS1
PS0
To clock
V
DDSYN
Detect
generation
circuitry
Clock
Select
BCS
t
REF
and
÷2
0.1
F
0.1
F
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05E1DWR3 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05E1MDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05E1P | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28 |
| MC68HC05E1DW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05E1CDW | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05E5 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E5DW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E5P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05E6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05E6CDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。