參數(shù)資料
型號(hào)： MC68HC05E1MDW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 58/86頁
文件大?。?/td> 491K
代理商： MC68HC05E1MDW
Timer, Phase-Locked Loop, and Custom Periodic Interrupt
Timer
MC68HC05E1 — Revision 2.0
General Release Specication
MOTOROLA
Timer, Phase-Locked Loop, and Custom Periodic Interrupt
61
RTIE — Real Time Interrupt Enable
When this bit is set, a CPU interrupt request is generated when the
RTIF bit is set. Reset clears this bit.
RT1:RT0 — Real Time Interrupt Rate Select
These two bits select one of four taps from the Real Time Interrupt
circuit.Table 6-1 shows the available interrupt rates with several fop
values. Reset sets these RT0 and RT1, selecting the lowest periodic
rate and therefore the maximum time in which to alter these bits if
necessary. Care should be taken when altering RT0 and RT1 if the
time-out period is imminent or uncertain. If the selected tap is
modified during a cycle in which the counter is switching, an RTIF
could be missed or an additional one could be generated. To avoid
problems, the COP should be cleared before changing RTI taps.
NOTE:
In rare instances, clearing any of the timer control and status register
(TCSR) flag or enable bits could result in vectoring to the reset vector
rather than the timer interrupt vector if the correct precautions are not
followed. Do not clear any of the timer flags or enable bits (i.e., TOF,
TOFE, RTI, and RTIF) with bit manipulation instructions.
Table 6-1. RTI Rates
RT1:RT0
RTI RATES AT fOP FREQUENCY SPECIFIED:
16.384 kHz
524 kHz
1.049 MHz
2.097 MHz
4.194 MHz
fOP
00
1 s
31.3 ms
15.6 ms
7.8 ms
3.9 ms
214 fop
01
2 s
62.5 ms
31.3 ms
15.6 ms
7.8 ms
215 fop
10
4 s
125 ms
62.5 ms
31.3 ms
15.6 ms
216 fop
11
8 s
250 ms
125.1 ms
62.5 ms
31.3 ms
217 fop
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