參數(shù)資料
型號(hào)： MC68HC05C9AP
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 21/162頁
文件大?。?/td> 1093K
代理商： MC68HC05C9AP
Instruction Set
Instruction Set Summary
MC68HC05C9A — Rev. 5.0
Advance Information
MOTOROLA
Instruction Set
117
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
RTI
Return from Interrupt
SP
← (SP) + 1; Pull (CCR)
SP
← (SP) + 1; Pull (A)
SP
← (SP) + 1; Pull (X)
SP
← (SP) + 1; Pull (PCH)
SP
← (SP) + 1; Pull (PCL)
INH
80
6
RTS
Return from
Subroutine
SP
← (SP) + 1; Pull (PCH)
SP
← (SP) + 1; Pull (PCL)
—— ———
INH
SBC #opr
SBC opr
SBC opr,X
SBC ,X
Subtract Memory Byte
and Carry Bit from
Accumulator
A
← (A) – (M) – (C)
——
IMM
DIR
EXT
IX2
IX1
IX
A2
B2
C2
D2
E2
F2
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
SEC
Set Carry Bit
C
← 1
—— —— 1INH
99
2
SEI
Set Interrupt Mask
I
← 1
— 1 ———
INH
9B
2
STA opr
STA opr,X
STA ,X
Store Accumulator in
Memory
M
← (A)
——
—
DIR
EXT
IX2
IX1
IX
B7
C7
D7
E7
F7
dd
hh ll
ee ff
ff
4
5
6
5
4
STOP
Stop Oscillator and
Enable IRQ Pin
— 0 ———
INH
8E
2
STX opr
STX opr,X
STX ,X
Store Index
Register In Memory
M
← (X)
——
—
DIR
EXT
IX2
IX1
IX
BF
CF
DF
EF
FF
dd
hh ll
ee ff
ff
4
5
6
5
4
SUB #opr
SUB opr
SUB opr,X
SUB ,X
Subtract Memory Byte
from
Accumulator
A
← (A) – (M)
——
IMM
DIR
EXT
IX2
IX1
IX
A0
B0
C0
D0
E0
F0
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
SWI
Software Interrupt
PC
← (PC) + 1; Push (PCL)
SP
← (SP) – 1; Push (PCH)
SP
← (SP) – 1; Push (X)
SP
← (SP) – 1; Push (A)
SP
← (SP) – 1; Push (CCR)
SP
← (SP) – 1; I ← 1
PCH
← Interrupt Vector High Byte
PCL
← Interrupt Vector Low Byte
— 1 ———
INH
83
10
Table 11-6. Instruction Set Summary (Sheet 6 of 7)
Source
Form
Operation
Description
Effect
on CCR
Ad
d
ress
M
ode
Op
cod
e
Ope
rand
Cycl
es
HI N Z C
相關(guān)PDF資料
PDF描述
MC68HSC05C9AB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP42
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MC68HSC05C9AFB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
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