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參數(shù)資料
| 型號(hào)： | MC68HC05C9AMB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | SHRINK, PLASTIC, DIP-42 |
| 文件頁數(shù)： | 87/124頁 |
| 文件大?。?/td> | 774K |
| 代理商： | MC68HC05C9AMB |
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MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
Freescale Semiconductor
65
Chapter 10
Serial Peripheral Interface (SPI)
10.1 Introduction
The serial peripheral interface (SPI) is an interface built into the device which allows several M68HC05
microcontroller units (MCU), or M68HC05 MCU plus peripheral devices, to be interconnected within a
single printed circuit board. In an SPI, separate wires are required for data and clock. In the SPI format,
the clock is not included in the data stream and must be furnished as a separate signal. An SPI system
may be configured in one containing one master MCU and several slave MCUs or in a system in which
an MCU is capable of being a master or a slave.
10.2 Features
SPI features include:
Full-duplex, 4-wire synchronous transfers
Master or slave operation
Bus frequency divided by 2 (maximum) master bit frequency
Bus frequency (maximum) slave bit frequency
Four programmable master bit rates
Programmable clock polarity and phase
End-of-transmission interrupt flag
Write collision flag protection
Master-master mode fault protection capability
10.3 SPI Signal Description
The four basic signals (MOSI, MISO, SCK, and SS) are described here. Each signal function is described
for both the master and slave modes.
NOTE
Any SPI output line has to have its corresponding data direction register bit
set. If this bit is clear, the line is disconnected from the SPI logic and
becomes a general-purpose input line. When the SPI is enabled, any SPI
input line is forced to act as an input regardless of what is in the
corresponding data direction register bit.
10.3.1 Master In/Slave Out (MISO)
The MISO line is configured as an input in a master device and as an output in a slave device. It is one
of the two lines that transfer serial data in one direction, with the most significant bit sent first. The MISO
line of a slave device is placed in the high-impedance state if the slave is not selected.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05C9AMFB | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AMFN | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AMP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9AP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC68HC05C9CP | 制造商:Motorola Inc 功能描述:IC UP HCMOS 68HC05C9CP DIP40 0 |
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