參數(shù)資料
型號: MC68HC05C9AMB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
封裝: SHRINK, PLASTIC, DIP-42
文件頁數(shù): 82/124頁
文件大小: 774K
代理商: MC68HC05C9AMB
Serial Communications Interface (SCI)
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
60
Freescale Semiconductor
T8 — Bit 8 (Transmitted)
When the SCI is transmitting 9-bit characters, T8 is the ninth bit of the transmitted character. T8 is
loaded into the transmit shift register at the same time that the SCDR is loaded into the transmit
register. Resets have no effect on the T8 bit.
M — Character Length Bit
This read/write bit determines whether SCI characters are 8 bits long or 9 bits long. The ninth bit can
be used as an extra stop bit, as a receiver wakeup signal, or as a mark or space parity bit. Resets have
no effect on the M bit.
1 = 9-bit SCI characters
0 = 8-bit SCI characters
WAKE — Wakeup Method Bit
This read/write bit determines which condition wakes up the SCI: a logic 1 (address mark) in the most
significant bit (MSB) position of a received character or an idle condition on the PD0/RDI pin. Resets
have no effect on the WAKE bit.
1 = Address mark wakeup
0 = Idle line wakeup
9.11.3 SCI Control Register 2
SCI control register 2 (SCCR2), shown in Figure 9-10, has these functions:
Enables the SCI receiver and SCI receiver interrupts
Enables the SCI transmitter and SCI transmitter interrupts
Enables SCI receiver idle interrupts
Enables SCI transmission complete interrupts
Enables SCI wakeup
Transmits SCI break characters
TIE — Transmit Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TDRE flag becomes set. Resets clear the
TIE bit.
1 = TDRE interrupt requests enabled
0 = TDRE interrupt requests disabled
TCIE — Transmission Complete Interrupt Enable Bit
This read/write bit enables SCI interrupt requests when the TC flag becomes set. Resets clear the
TCIE bit.
1 = TC interrupt requests enabled
0 = TC interrupt requests disabled
Address: $000F
Bit 7
6543
2
1
Bit 0
Read:
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
Write:
Reset:
00000
0
Figure 9-10. SCI Control Register 2 (SCCR2)
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