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參數(shù)資料
| 型號： | MC68HC05C5CFN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 39/58頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MC68HC05C5CFN |
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Page 38
MOTOROLA
Section 6: Timer
MC68HC05C5 Specification Rev. 1.2
6.7
TIMER DURING WAIT MODE
The CPU clock halts during the WAIT mode, but the timer remains active. If interrupts are
enabled, a timer interrupt will cause the processor to exit the WAIT mode.
6.8
TIMER DURING STOP MODE
In the STOP mode, the timer stops counting and holds the last count value if STOP is
exited by an interrupt. If RESET is used, the counter is forced to $FFFC. During STOP,
if at least one valid input capture edge occurs at the TCAP pin, the input capture detect
circuit is armed. This does not set any timer flags nor wake up the MCU, but when the
MCU does wake up, there is an active input capture flag and data from the first valid edge
that occurred during the STOP mode. If RESET is used to exit STOP mode, then no input
capture flag or data remains, even if a valid input capture edge occurred.
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