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參數(shù)資料
| 型號(hào)： | MC68HC05BD3P |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 45/112頁(yè) |
| 文件大?。?/td> | 864K |
| 代理商： | MC68HC05BD3P |
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MOTOROLA
4-6
MC68HC05BD3
RESETS AND INTERRUPTS
4
Figure 4-3 External Interrupt Circuit and Timing
+
&
External
Request
Interrupt
Power-On Reset
External Reset
External Interrupt
being serviced
D
C
R
Q
VDD
IRQ pin
I BIT (CCR)
IRQ
tILIH
tILIL
EDGE SENSITIVE TRIGGER
CONDITION
The minimum pulse width tILIH is one
internal bus period. The period tILIL
should not be less than the number of
tCYC cycles it takes to execute the
interrupt service routine plus 21 tcyc
cycles.
tILIL
Wired ORed
Interrupt signals
IRQ
If after servicing an interrupt the IRQ
pin remains low, then the next interrupt
is recognized. Normally used with wired
OR connection.
Normally used with pull-up resistors for
wired-OR connection.
(b) Interrupt Mode Diagram
(a) Interrupt Function Diagram
LEVEL SENSITIVE TRIGGER
CONDITION
&
+
IRQN bit
(read of vectors)
TPG
36
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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