MC68HC05B6
Rev. 4
MOTOROLA
F-21
MC68HC705B16N
14
(1) All I
measurements taken with suitable decoupling capacitors across the power supply to suppress the transient switching
currents inherent in CMOS designs (see Section 2).
(2) Typical values are at md point of voltage range and at 25
°
C only.
(3) RUN and WAIT I
: measured using an external square-wave clock source (f
OSC
= 2.0MHz); all inputs 0.2 V fromrail; no
DC loads; maximumload on outputs 50pF (20pF on OSC2).
STOP /WAIT I
: all ports configured as inputs; V
= 0.2 V and V
IH
= V
DD
– 0.2 V: STOP I
DD
measured with OSC1 = V
DD
.
WAIT I
DD
is affected linearly by the OSC2 capacitance.
Table F-8
DC electrical characteristics for 3.3V operation
(V
DD
= 3.3Vdc
±
10%, V
SS
= 0Vdc, T
A
= T
L
to T
H
)
Characteristic
(1)
Output voltage
I
LOAD
= – 10
μ
A
I
LOAD
= +10
μ
A
Output high voltage (I
LOAD
= 0.8mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2
Output high voltage (I
LOAD
= 1.6mA)
TDO, SCLK, PLMA, PLMB
Output low voltage (I
LOAD
= 1.6mA)
PA0–7, PB0–7, PC0–7, TCMP1, TCMP2,
TDO, SCLK, PLMA, PLMB
Output low voltage (I
LOAD
= 1.6mA)
RESET
Input high voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1,
IRQ, RESET, TCAP1, TCAP2, RDI
Input low voltage
PA0–7, PB0–7, PC0–7, PD0–7, OSC1, IRQ
,
RESET, TCAP1, TCAP2, RDI
Supply current
(3)
RUN (SM= 0) (See Figure 11-1)
RUN (SM= 1) (See Figure 11-2)
WAIT (SM= 0) (See Figure 11-3)
WAIT (SM= 1) (See Figure 11-4)
STOP
0 to 70 (standard)
– 40 to 85 (extended)
– 40 to 105 (industrial)
– 40 to 125 (automotive)
High-Z leakage current
PA0–7, PB0–7, PC0–7, TDO, RESET , SCLK
Input current
Port B and port C pull-down (V
IN
=V
IH
)
Input current (0 to 70)
IRQ, OSC1, TCAP1, TCAP2, RDI,
PD0/AN0-PD7/AN7 (channel not selected)
Input current (– 40 to 125)
IRQ, OSC1, TCAP1, TCAP2, RDI,
PD0/AN0-PD7/AN7 (channel not selected)
Capacitance
Ports (as input or output), RESET TDO, SCLK
IRQ, TCAP1, TCAP2, OSC1, RDI
PD0/AN0–PD7/AN7 (A/D off)
PD0/AN0–PD7/AN7 (A/D on)
Symbol
Mn
Typ
(2)
Max
Unit
V
OH
V
OL
V
DD
– 0.1
—
—
—
—
0.1
V
V
OH
V
OH
V
DD
– 0.3
V
DD
– 0.3
V
DD
– 0.1
V
DD
– 0.1
—
—
V
V
OL
V
OL
—
0.1
0.2
0.4
0.6
V
V
IH
0.7V
DD
—
V
DD
V
V
IL
V
SS
—
0.2V
DD
V
I
DD
I
DD
I
DD
I
DD
I
DD
I
DD
I
DD
I
DD
—
—
—
—
—
—
—
—
2.0
0.8
1.0
0.4
1
—
—
—
3
1
1.5
0.5
10
10
40
60
mA
mA
mA
mA
μ
A
μ
A
μ
A
μ
A
I
IL
—
±
0.2
±
1
μ
A
I
RPD
80
μ
A
I
IN
—
±
0.2
±
1
μ
A
I
IN
—
—
±
5
μ
A
C
OUT
C
IN
C
IN
C
IN
—
—
—
—
—
—
12
22
12
8
—
—
pF
pF
pF
pF
TPG