參數(shù)資料
型號： MC68C912B32FU8
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-Bit Microcontroller
中文描述： 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 110/128頁
文件大?。?/td> 748K
代理商： MC68C912B32FU8
MOTOROLA
110
MC68HC912B32
MC68HC912B32TS/D
The ATD control register 4 is used to select the clock source and set up the prescaler. Writes to the ATD
control registers initiate a new conversion sequence. If a write occurs while a conversion is in progress,
the conversion is aborted and ATD activity halts until a write to ATDCTL5 occurs.
SMP1, SMP0 — Select Sample Time
These bits are used to select one of four sample times after the buffered sample and transfer has oc-
curred. Total conversion time depends on initial sample time (two ATD clocks), transfer time (two ATD
clocks), final sample time (programmable, refer to
Table 39
), and resolution time (ten ATD clocks).
PRS4, PRS3, PRS2, PRS1, PRS0 — Select Divide-By Factor for ATD P-Clock Prescaler.
The binary value written to these bits (1 to 31) selects the divide-by factor for the modulo counter-based
prescaler. The P clock is divided by this value plus one and then fed into a
÷
2 circuit to generate the
ATD module clock. The divide-by-two circuit insures symmetry of the output clock signal. Clearing these
bits causes the prescale value to default to one which results in a
÷
2 prescale factor. This signal is then
fed into the
÷
2 logic. The reset state divides the P clock by a total of four and is appropriate for nominal
operation between 2 MHz and 8 MHz bus rate.
Table 40
shows the divide-by operation and the appro-
priate range of system clock frequencies.
Table 38 ATD Response to Background Debug Enable
FRZ1 FRZ0
0
0
1
1
ATD Response
0
1
0
1
Continue conversions in active background mode
Reserved
Finish current conversion, then freeze
Freeze when BDM is active
ATDCTL4
— ATD Control Register 4
$0064
Bit 7
6
5
4
3
2
1
Bit 0
0
SMP1
SMP0
PRS4
PRS3
PRS2
PRS1
PRS0
RESET:
0
0
0
0
0
0
0
1
Table 39 Final Sample Time Selection
SMP1
0
0
1
1
SMP0
0
1
0
1
Final Sample Time
2 ATD clock periods
4 ATD clock periods
8 ATD clock periods
16 ATD clock periods
Total 8-Bit Conversion Time
16 ATD clock periods
18 ATD clock periods
22 ATD clock periods
30 ATD clock periods
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