參數(shù)資料
型號： MC68C912B32FU8
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 16-Bit Microcontroller
中文描述： 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 107/128頁
文件大?。?/td> 748K
代理商： MC68C912B32FU8
MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
107
If a BREAK symbol is received while the BDLC is transmitting or receiving, an invalid symbol interrupt
will be generated. Reading the BSVR register will clear this interrupt condition. The BDLC will wait for
the bus to idle, then wait for SOF.
The BDLC cannot transmit a BREAK symbol. It can only receive a BREAK symbol from the J1850 bus.
Table 37 BDLC J1850 Bus Error Summary
Error Condition
BDLC Function
Bus short to V
BATT
The BDLC will not transmit until the bus is idle.
Bus short to ground
Thermal overload will shutdown physical interface.
Fault condition is reflected in BSVR as invalid symbol.
The BDLC will abort transmission immediately.
Invalid symbol interrupt will be generated.
Invalid symbol interrupt will be generated.
The BDLC will wait for SOF.
CRC error interrupt will be generated.
The BDLC will wait for SOF.
The BDLC will wait for the next valid SOF.
Invalid symbol interrupt will be generated.
Invalid symbol interrupt will be generated.
The BDLC will wait for SOF.
Invalid symbol: BDLC receives
invalid bits (noise)
Framing Error
CRC Error
BDLC receives BREAK symbol
Invalid Symbol: BDLC sends an
EOD but receives an active symbol
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