MOTOROLA
M68020 USER’S MANUAL
1- 11
Table 1-2. Instruction Set
Mnemonic
Description
Mnemonic
Description
ABCD
Add Decimal with Extend
MOVE USP
Move User Stack Pointer
ADD
Add
MOVEC
Move Control Register
ADDA
Add Address
MOVEM
Move Multiple Registers
ADDI
Add Immediate
MOVEP
Move Peripheral
ADDQ
Add Quick
MOVEQ
Move Quick
ADDX
Add with Extend
MOVES
Move Alternate Address Space
AND
Logical AND
MULS
Signed Multiply
ANDI
Logical AND Immediate
MULU
Unsigned Multiply
ASL, ASR
Arithmetic Shift Left and Right
NBCD
Negate Decimal with Extend
Bcc
Branch Conditionally
NEG
Negate
BCHG
Test Bit and Change
NEGX
Negate with Extend
BCLR
Test Bit and Clear
NOP
No Operation
BFCHG
Test Bit Field and Change
NOT
Logical Complement
BFCLR
Test Bit Field and Clear
OR
Logical Inclusive OR
BFEXTS
Signed Bit Field Extract
ORI
Logical Inclusive OR Immediate
BFEXTU
Unsigned Bit Field Extract
ORI CCR
Logical Inclusive Or Immediate to Condition Codes
BFFFO
Bit Field Find First One
ORI SR
Logical Inclusive OR Immediate to Status Register
BFINS
Bit Field Insert
PACK
Pack BCD
BFSET
Test Bit Field and Set
PEA
Push Effective Address
BFTST
Test Bit Field
RESET
Reset External Devices
BKPT
Breakpoint
ROL, ROR
Rotate Left and Right
BRA
Branch Always
ROXL,ROXR
Rotate with Extend Left and Right
BSET
Test Bit and Set
RTD
Return and Deallocate
BSR
Branch to Subroutine
RTE
Return from Exception
BTST
Test Bit
RTM
Return from Module
CALLM
Call Module
RTR
Return and Restore Codes
CAS
Compare and Swap Operands
RTS
Return from Subroutine
CAS2
Compare and Swap Dual Operands
SBCD
Subtract Decimal with Extend
CHK
Check Register Against Bound
Scc
Set Conditionally
CHK2
Check Register Against Upper and Lower Bound
STOP
Stop
CLR
Clear
SUB
Subtract
CMP
Compare
SUBA
Subtract Address
CMPA
Compare Address
SUBI
Subtract Immediate
CMPI
Compare Immediate
SUBQ
Subtract Quick
CMPM
Compare Memory to Memory
SUBX
Subtract with Extend
CMP2
Compare Register Against Upper and Lower Bounds
SWAP
Swap Register Words
DBcc
Test Condition, Decrement and Branch
TAS
Test and Set an Operand
DIVS, DIVSL
Signed Divide
TRAP
Trap
DIVU, DIVUL
Unsigned Divide
TRAPcc
Trap Conditionally
EOR
Logical Exclusive OR
TRAPV
Trap on Overflow
EORI
Logical Exclusive Or Immediate
TST
Test Operand
EXG
Exchange Registers
UNLK
Unlink
EXT, EXTB
Sign Extend
UNPK
Unpack BCD
ILLEGAL
Take Illegal Instruction Trap
JMP
Jump
COPROCESSOR INSTRUCTIONS
JSR
Jump to Subroutine
Mnemonic
Description
LEA
Load Effective Address
cpBcc
Branch Conditionally
LINK
Link and Allocate
cpDBcc
Test Coprocessor Condition, Decrement and Branch
LSL, LSR
Logical Shift Left and Right
cpGEN
Coprocessor General Instruction
MOVE
Move
cpRESTORE
Restore Internal State of Coprocessor
MOVEA
Move Address
cpSAVE
Save Internal State of Coprocessor
MOVE CCR
Move Condition Code Register
cpScc
Set Conditionally
MOVE SR
Move Status Register
cpTRAPcc
Trap Conditionally
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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