參數(shù)資料
型號(hào): MC68020RC25E
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 183/306頁(yè)
文件大?。?/td> 0K
描述: IC MICROPROC 32-BIT 25MHZ 114PGA
標(biāo)準(zhǔn)包裝: 14
系列: M680x0
處理器類型: M680x0 32-位
速度: 25MHz
電壓: 5V
安裝類型: 通孔
封裝/外殼: 114-BPGA
供應(yīng)商設(shè)備封裝: 114-PGA(34.54x34.54)
包裝: 托盤(pán)
其它名稱: Q1165253
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MOTOROLA
M68020 USER’S MANUAL
9- 9
9.3 POWER AND GROUND CONSIDERATIONS
The MC68020/EC020 is fabricated in Motorola's advanced HCMOS process and is
capable of operating at clock frequencies of up to 25 MHz. While the use of CMOS for a
device containing such a large number of transistors allows significantly reduced power
consumption compared to an equivalent NMOS circuit, the high clock speed makes the
characteristics of power supplied to the device very important. The power supply must be
able to furnish large amounts of instantaneous current when the MC68020/EC020
performs certain operations, and it must remain within the rated specification at all times.
To meet these requirements, more detailed attention must be given to the power supply
connection to the MC68020/EC020 than is required for NMOS devices operating at slower
clock rates.
To reduce the amount of noise in the power supply connected to the MC68020/EC020
and to provide for the instantaneous current requirements, common capacitive decoupling
techniques should be observed. While there is no recommended layout for this capacitive
decoupling, it is essential that the inductance and distance between these devices and the
MC68020/EC020 be minimized to provide sufficiently fast response time to satisfy
momentary current demands and to maintain a constant supply voltage. It is suggested
that high-frequency, high-quality capacitors be placed as close to the MC68020/EC020 as
possible. Table 9-2 lists the VCC and GND pin assignments for the MC68EC020 PPGA
(RP suffix) package. Table 9-3 lists the VCC and GND pin assignments for the
MC68EC020 PQFP (FG suffix) package. Refer to Section 11 Ordering Information and
Mechanical Data for the VCC and GND pin assignments for the MC68020 packages.
When assigning capacitors to the VCC and GND pins, the noisier pins (address and data
buses) should be heavily decoupled from the internal logic pins. Typical decoupling
practices include a high-frequency, high-quality capacitor to decouple every device on the
printed circuit board; however, due to the power requirements and drive capability of the
MC68020/EC020, each VCC pin should be decoupled with an individual capacitor.
Motorola recommends using a capacitor in the range of 0.01
F to 0.1 F on each VCC
pin on each device to provide filtering for most frequencies prevalent in a digital system. In
addition to the individual decoupling, several bulk decoupling capacitors should be placed
onto the printed circuit board with typical values in the range of 33
F to 330 F. When
power and ground planes are used with an adequate number of high-frequency, high-
quality capacitors, the system noise will be reduced to the required levels, and the
MC68020/EC020 will function properly. Similar decoupling techniques should also be
observed for other VLSI devices in the system.
In addition to the capacitive decoupling of the power supply, care must be taken to ensure
a low-impedance connection between all MC68020/EC020 VCC and GND pins and the
system power supply. A solid power supply connection from the power and ground planes
to the MC68020/EC020 VCC and GND pins, respectively, will meet this requirement.
Failure to provide connections of sufficient quality between the MC68020/EC020 power
pins and the system power supplies will result in increased assertion delays for external
signals, decreased voltage noise margins, increased system noise, and possible errors in
MC68020/EC020 internal logic.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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