參數(shù)資料
型號： MC56F8335MFGE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝： ROHS COMPLIANT, PLASTIC, LQFP-128
文件頁數(shù)： 40/164頁
文件大?。?/td> 871K
代理商： MC56F8335MFGE
56F8335 Technical Data, Rev. 5
134
Freescale Semiconductor
Preliminary
10.3 AC Electrical Characteristics
Tests are conducted using the input levels specified in Table 10-5. Unless otherwise specified,
propagation delays are measured from the 50% to the 50% point, and rise and fall times are measured
between the 10% and 90% points, as shown in Figure 10-1.
Figure 10-1 Input Signal Measurement References
Figure 10-2 shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached VOL or VOH
Data Invalid state, when a signal level is in transition between VOL and VOH
Figure 10-2 Signal States
10.4 Flash Memory Characteristics
Table 10-12 Flash Timing Parameters
Characteristic
Symbol
Min
Typ
Max
Unit
Program time1
1. There is additional overhead which is part of the programming sequence. See the 56F8300 Peripheral User Manual
for details. Program time is per 16-bit word in Flash memory. Two words at a time can be programmed within the Pro-
gram Flash module, as it contains two interleaved memories.
Tprog
20
—
μs
Erase time2
2. Specifies page erase time. There are 512 bytes per page in the Data and Boot Flash memories. The Program Flash
module uses two interleaved Flash memories, increasing the effective page size to 1024 bytes.
Terase
20
—
ms
Mass erase time
Tme
100
—
ms
VIH
VIL
Fall Time
Input Signal
Note: The midpoint is VIL + (VIH – VIL)/2.
Midpoint1
Low
High
90%
50%
10%
Rise Time
Data Invalid State
Data1
Data2 Valid
Data
Tri-stated
Data3 Valid
Data2
Data3
Data1 Valid
Data Active
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