參數(shù)資料
型號(hào): MC10E457FN
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER
中文描述: 10E SERIES, TRIPLE 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 110K
代理商: MC10E457FN
SEL0
D0a
VBB
D0b
D0b
COMSEL
VCCO
SEL1
D1a
D1a
VEE
VBB
D1b
D1b
26
27
28
2
3
4
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
5
6
7
8
9
10
SEL2
D2a
D2a
VBB
D2b
D2b
Q2
Q2
VCC
Q1
Q1
Q0
Q0
D0a
1
Pinout: 28-Lead PLCC
(Top View)
* All VCC and VCCO pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals.
The higher frequency outputs provide the device with a >1.0GHz
bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make the
device well suited for both data path and random logic applications.
The differential inputs have internal clamp structures which will force
the Q output of a gate in an open input condition to go to a LOW state.
Thus, inputs of unused gates can be left open and will not affect the
operation of the rest of the device. Note that the input clamp will take
affect only if both inputs fall 2.5V below VCC.
Differential D and Q; VBB available
700ps Max. Propagation Delay
High Frequency Outputs
Separate and Common Select
Extended 100E VEE Range of –4.2V to –5.46V
Internal 75k
Input Pulldown Resistors
PIN NAMES
Pin
Function
Dn
[
0:2
]
; Dn
[
0:2
]
SEL
COMSEL
VBB
Q
[
0:2
]
, Q
[
0:2
]
Differential Data Inputs
Individual Select Input
Common Select Input
VBB Reference Output
Differential Data Outputs
FUNCTION TABLE
SEL
Data
H
L
a
b
TRIPLE DIFFERENTIAL
2:1 MULTIPLEXER
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
相關(guān)PDF資料
PDF描述
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