參數(shù)資料
型號: MC100EP222
廠商: Motorola, Inc.
英文描述: Low Voltage ECL/PECL 1:15 Clock Driver(低壓ECL/PECL 1:15時鐘驅(qū)動器)
中文描述: 低壓ECL / PECL的一時15分時鐘驅(qū)動器(低壓ECL / PECL的一時15時鐘驅(qū)動器)
文件頁數(shù): 3/8頁
文件大小: 151K
代理商: MC100EP222
3
Motorola
QB1
QB0
QB0
VCCO
QA1
QA1
QA0
QD2
QD2
QD3
QD3
QD4
QD4
V
Q
Q
Q
Q
Q
Q
Q
V
M
F
F
C
C
C
C
45
46
47
48
49
50
51
52
20
19
18
17
16
15
14
1
2
3
4
5
6
7
8
39
38
37
36
35
34
33
32
21
MC100EP222
Figure 3. 52 Lead Package Pinout
(Top View)
QA0
QD5
QD5
C
V
F
F
9
10
11
12
QD0
QD0
QD1
QD1
24
23
22
25
Q
V
N
N
31
30
29
28
VCCO
QB2
QB2
41
42
43
44
QB1
13
27
V
V
VCCO
VCCO
26
40
PIN CONFIGURATION
Pin
I/O
Type
Internal resistor
Description
CLK0, CLK0
Input
ECL/PECL
CLK0: pull-down,
CLK0: pull-up
Differential clock frequency input
CLK1, CLK1
Input
ECL/PECL
CLK1: pull-down,
CLK1: pull-up
Differential clock frequency input
CLK_SEL
QAn, QAn
QBn, QBn
QCn, QCn
FSELA
FSELB
FSELC
FSELD
MR
VBB
VEE
VCC
VCCO
Input
Output
Output
Output
Input
Input
Input
Input
Input
Output
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
ECL/PECL
DC
Power supply
Power supply
Power supply
pull-down
Clock input select
Bank A differential outputs
Bank B differential outputs
Bank C differential outputs
Selection of bank A output frequency
Selection of bank B output frequency
Selection of bank C output frequency
Selection of bank D output frequency
Reset
ECL/PECL DC reference
Negative power supply
Positive core logic power supply
Positive output power supply
pull-down
pull-down
pull-down
pull-down
pull-down
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