
European MCU Design Centre
MB91F464AA preliminary datasheet ver. 1.11
Page 3 of 67
Table of contents
1
Overview........................................................................................................................ 5
1.1
Block Diagram .......................................................................................................... 5
2
Feature List ................................................................................................................... 6
2.1
Overview Table ........................................................................................................ 6
2.2
Core Functionality..................................................................................................... 7
2.2.1
Memory Map ...................................................................................................... 8
2.2.2
FR70 CPU Core................................................................................................. 9
2.2.3
Instruction Cache ............................................................................................... 9
2.2.4
Interrupt Controller ............................................................................................. 9
2.2.5
External Bus Interface.......................................................................................10
2.2.6
DMA Controller .................................................................................................10
2.2.7
Internal Data RAM.............................................................................................10
2.2.8
Internal Program/Data RAM ..............................................................................10
2.3
Peripheral Function .................................................................................................11
2.4
Embedded Program/Data Memory (Flash) ..............................................................15
2.4.1
Flash Features ..................................................................................................15
2.4.2
CPU Mode ........................................................................................................16
2.4.2.1
Flash configuration in CPU mode .......................................................................................... 16
2.4.2.2
Flash access timing settings in CPU mode............................................................................ 17
2.4.3
Parallel flash programming mode......................................................................18
2.4.3.1
Flash configuration in parallel flash programming mode........................................................ 18
2.4.3.2
Pin connections in parallel programming mode ..................................................................... 19
2.4.4
Flash Security ...................................................................................................20
2.4.4.1
Vector addresses................................................................................................................... 20
2.4.4.2
Security Vector FSV1 ............................................................................................................ 20
2.4.4.3
Security Vector FSV2 ............................................................................................................ 22
2.4.4.4
Register description for Flash Security .................................................................................. 22
3
Package and Pin Assignment .....................................................................................23
3.1
Package ..................................................................................................................23
3.2
I/O Pins and Their Functions ...................................................................................24
3.3
I/O Pin Types...........................................................................................................27
4
Recommended Settings ..............................................................................................28
4.1
PLL and Clockgear settings.....................................................................................28
4.2
Flash interface settings............................................................................................29