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參數(shù)資料
| 型號： | MB91F361G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 64 MHz, MICROCONTROLLER, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 54/54頁 |
| 文件大小： | 675K |
| 代理商： | MB91F361G |
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FME / EMDC / Br mb91f361g.fm
9
7/19/00
I2C-2
for standard and fast
mode
master or slave transmission
arbitration function
clock synchronization function
slave address and general call address
detect function
transfer direction detect function
start condition repeat generation and
detection function
bus error detect function
compatible to I2C standard and fast
mode specication (operation up to 400
kHz,
10 bit addressing)
includes clock divider functionality
Clock disable
Only I2C-1 or I2C-2 can be used, not
both in parallel. Bit 0 of F362MD will
be used to decide which module is
connected to the SCL and SDA
pads. By default it is I2C-1.
SCL and SDA lines include optional
noise lter. The noise lter allows
the suppression of spikes in the
range of 1 to 1.5 cycles of CLKP.
Communication on the I2C bus
between other connected devices is
not possible if MB91F361G is
switched off.
16-bit Input Capture
(ICU)
(4 channels)
rising edge, falling edge or rising & falling
edge sensitive
two 16-bit capture registers
signals an interrupt at external event
Clock disable
16-bit Output Compare
OCU
(4 channels)
signals an interrupt when a match with
the 16-bit free running counter occurs
an output signal can be generated
Clock disable
Free running Counter
(2 channels for ICU and
OCU modules)
16-bit free running counter, signals an
interrupt when overow or match with
compare register_0
includes prescaler (fRES/2
2, f
RES/2
4,
fRES/2
5, f
RES/2
6)
timer data register has R/W access
Clock disable
LED Port
(8 channels)
allows to source 14 mA at VDD-0.8 V
and sink 24 mA at Vss+0.8 V respec-
tively
The sum of all IOL currents of these
8 channels may not exceed 120 mA.
The sum of all IOH currents of these
channels may not exceed 120 mA.
Alarm Comparator
(OV/UV detection)
monitors an external voltage
and generates an interrupt in case of a
voltage lower or higher than the dened
thresholds
status is readable, interrupts can be
masked separately
Clock disable
uses external 4:1 voltage divider
Power down reset
monitors VDD and generates a reset if
VDD is less than a dened threshold volt-
age
is disabled in RTC and STOP mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91F361GAPFVS | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91F362GAPFVS | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91F362GAPFVS-G-N2E1 | 功能描述:IC MCU 32BIT 512KB FLASH 制造商:cypress semiconductor corp 系列:FR MB91360G 零件狀態(tài):在售 核心處理器:FR50 RISC 核心尺寸:32-位 速度:64MHz 連接性:CAN，I2C，串行輸入/輸出，UART/USART 外設(shè):DMA，POR，PWM，WDT I/O 數(shù):160 程序存儲容量:512KB（512K x 8） 程序存儲器類型:閃存 EEPROM 容量:- RAM 容量:20K x 8 電壓 - 電源（Vcc/Vdd）:4.25 V ~ 5.25 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b，D/A 2x10b 振蕩器類型:外部 工作溫度:-40°C ~ 85°C（TA） 標(biāo)準(zhǔn)包裝:24 |
| MB91F362GAPVSR-GE1 | 制造商:FUJITSU 功能描述: |
| MB91F362GB | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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