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參數(shù)資料
| 型號(hào)： | MB91605PMC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 80 MHz, RISC MICROCONTROLLER, PQFP176 |
| 封裝： | 24 X 24 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-176 |
| 文件頁(yè)數(shù)： | 12/68頁(yè) |
| 文件大?。?/td> | 1435K |
| 代理商： | MB91605PMC |
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MB91605 Series
2
Built-in multiplier supported at the instruction level
- Signed 32-bit multiplication : 5 cycles
- Signed 16-bit multiplication : 3 cycles
Interrupts (save PC and PS) : 6 cycles, 16 priority levels
Harvard architecture enabling program access and data access to be executed simultaneously
Instruction prefetch feature implemented using a 4-word queue in the CPU
Instruction compatible with the FR family
2.
Bus interface
Operating frequency : Configurable from 1/1 to 1/4 of the on-chip frequency
Basic bus cycle : Read : 1 cycle; Write : 3 cycles
Supports multiplexed address/data bus
Unused address pins can be used as general-purpose I/O ports
Configurable as read-only (other than read-only areas, SDRAM areas)
Automatic wait cycle generation function programmable for each area (Max 15 cycles)
Areas configurable in the minimum unit of 1 Mbyte.
Capable of chip select output for 8 completely independent areas
3.
Built-in Memory
RAM : 128 Kbytes
Instruction cache : 8 Kbytes
Data cache : 8 Kbytes
4.
DMAC (DMA Controller)
4 channels
Two transfer sources : Internal peripheral/software
Addressing mode : Specified as full 32-bit addresses (increment/decrement/fixed)
Transfer modes : Burst transfer/block transfer
Transfer data size : Selectable from 1, 2, 4, or 32 bytes
5.
16-bit Reload Timer (Including 1 Channel for REALOS)
3 channels
Internal clock: Frequency division selectable from 2, 4, 8, 16, 32, and 64
(Continued)
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