參數(shù)資料
型號(hào): MB91151APMC-G
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-144
文件頁數(shù): 78/96頁
文件大小: 2300K
代理商: MB91151APMC-G
MB91151A Series
8
DS07-16312-2E
(Continued)
Pin No.
Pin name
Circuit
type
Function
105
PI2/SCK2/TO2
P
UART2 clock I/O, Reload timer 2 output
When UART2 clock output is not allowed, reload timer 2 can be output by
allowing it.
This pin is available as a port when neither UART2 clock output nor reload
timer output is allowed.
106
PI1/SOT2
P
UART2 data output
This function is activated when UART2 data output is allowed.
This pin is available as a port when UART2 clock output is not allowed.
107
PI0/SIN2
P
UART2 data input
Since this input is used more or less continuously while UART2 is en-
gaged in input operations, output by the port needs to be stopped except
when it is performed deliberately.
This pin is available as a port when UART2 data input is not in use.
108
PH5/SCK1/TO1
P
UART1 clock I/O, Reload timer 1 output
When UART1 clock output is not allowed, reload timer 1 can be output by
allowing it.
This pin is available as a port when neither UART1 clock output nor reload
timer output is allowed.
109
PH4/SOT1
P
UART1 data output
This function is activated when UART1 data output is allowed.
This pin is available as a port when UART1 clock output is not allowed.
110
PH3/SIN1
P
UART1 data input
Since this input is used more or less continuously while UART1 is en-
gaged in input operations, output by the port needs to be stopped except
when it is performed deliberately.
This pin is available as a port when UART1 data input is not in use.
111
PH2/SCK0/TO0
P
UART0 clock I/O, Reload timer 0 output
When UART0 clock output is not allowed, reload timer 0 can be output by
allowing it.
This pin is available as a port when neither UART0 clock output nor reload
timer output is allowed.
112
PH1/SOT0
P
UART0 data output
This function is activated when UART0 data output is allowed.
This pin is available as a port when UART0 clock output is not allowed.
113
PH0/SIN0
P
UART0 data input
Since this input is used more or less continuously while UART0 is en-
gaged in input operations, output by the port needs to be stopped except
when it is performed deliberately.
This pin is available as a port when UART0 data input is not in use.
114
PL0/DREQ0
F
DMA external transfer request input
Since this input is used more or less continuously when selected as a
DMAC transfer factor, output by the port needs to be stopped except when
it is performed deliberately.
This pin is available as a port when DMA external transfer request input is
not in use.
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