參數(shù)資料
型號: MB91151APMC-G
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LFQFP-144
文件頁數(shù): 50/96頁
文件大?。?/td> 2300K
代理商: MB91151APMC-G
MB91151A Series
54
DS07-16312-2E
8.
Interrupt Controller
The interrupt controller accepts and arbitrates interrupts.
Block Diagram
to LEVEL0*4
ILM
NMI processing
Level
determination
Vector
determination
Le
v
el
v
ector
gener
a
tion
Priority determination
INT0*2
OR
NMI*6
.
(DLYIRQ)
.
DLYI*1
.
ICR00
ICR47
4
5
Request to
withdraw
HLDREQ
6
R bus
6
LEVEL4
HLDCAN*3
to VCT0*5
VCT5
Resource
interrupt 00
Resource
interrupt 47
*1 : DLYI represents the delay interrupt module (delay interrupt generator) . For detailed information, see
“10. Delay Interrupt Module”.
*2 : INT0 is a wake-up signal for the clock controller in sleep or stop mode.
*3 : HLDCAN is a bus surrender request signal for bus masters except for the CPU.
*4 : LEVEL 4 to LEVEL 0 are interrupt level outputs.
*5 : VCT 5 to VCT 0 are interrupt vector outputs.
*6 : This product type does not have the NMI function.
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