參數(shù)資料
型號(hào)： MB91110PMT2
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP144
封裝： PLASTIC, LQFP-144
文件頁(yè)數(shù)： 91/94頁(yè)
文件大?。?/td> 1099K
代理商： MB91110PMT2
95
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
The assembly code example returns the TCNTn value in the r17:r16 register pair.
It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt occurs between the two instructions
accessing the 16-bit register, and the interrupt code updates the temporary register by accessing the same or any other of the
16-bit timer registers, then the result of the access outside the interrupt will be corrupted. Therefore, when both the main code
and the interrupt code update the temporary register, the main code must disable the interrupts during the 16-bit access.
The following code examples show how to do an atomic read of the TCNTn Register contents. Reading any of the OCRnx or
ICRn registers can be done by using the same principle.
Note:
1.
The example code assumes that the part specific header file is included.
For I/O registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be
replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”,
“SBRC”, “SBR”, and “CBR”.
The assembly code example returns the TCNTn value in the r17:r16 register pair.
Assembly Code Example(1)
TIM16_ReadTCNT
n:
; Save global interrupt flag
in
r18,SREG
; Disable interrupts
cli
; Read TCNT
n into r17:r16
in
r16,TCNT
nL
in
r17,TCNT
nH
; Restore global interrupt flag
out
SREG,r18
ret
C Code Example(1)
unsigned int
TIM16_ReadTCNT
n( void )
{
unsigned char
sreg;
unsigned int
i;
/* Save global interrupt flag */
sreg = SREG;
/* Disable interrupts */
_CLI();
/* Read TCNT
n into i */
i = TCNT
n;
/* Restore global interrupt flag */
SREG = sreg;
return
i;
}
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