![](http://datasheet.mmic.net.cn/330000/MB90F654A_datasheet_16438029/MB90F654A_49.png)
49
MB90650A Series
(2) Register Configuration
Address : 000070
H
D07
D06
D05
D04
D03
D02
D01
D00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Initial value
Initial value
Initial value
Initial value
Initial value
Initial value
00001000
B
00000000
B
Initial value
Initial value
00000000
B
Up/down count register channel 0 (UDCR0)
Address : 000071
H
D17
D16
D15
D14
D13
D12
D11
D10
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
00000000
B
Up/down count register channel 1 (UDCR1)
Address : 000072
H
D07
D06
D05
D04
D03
D02
D01
D00
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
00000000
B
Reload compare register channel 0 (RCR0)
Address : 000073
H
D17
D16
D15
D14
D13
D12
D11
D10
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
00000000
B
Reload compare register channel 1 (RCR1)
Address : 000074
H
000078
H
CSTR
CITE
UDIE
CMPF OVFF
UDFF
UDF1
UDF0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Counter status register channel 0, channel 1 (CSR0, CSR1)
CCRH0
(Reversed area)
CCRH1
CCRL1
CSR1
CCRL0
UDCR1
RCR1
(Reversed area)
CSR0
RCR0
UDCR0
8 bits
bit 15
bit 8 bit 7
bit 0
8 bits
00000000
B
Address : 000076
H
00007A
H
–
–
CTUT UCRE RLDE UDCC CGSC CGE1 CGE0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Counter control register channel 0, channel 1 (CCRL0, CCRL1)
Address : 000077
H
M16E CDCF
CFIE
CLKS CMS1 CMS0 CES1
CES0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Counter control register channel 0 (CCRH0)
00000000
B
Address : 00007B
H
–
–
CDCF
CFIE
CLKS CMS1 CMS0 CES1
CES0
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Counter control register channel 1 (CCRH1)
X0001000
B
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
: Readable and writable
: Read only
: Write only
W
–
: Unused
X : Indeterminate
R