參數(shù)資料
型號(hào): MB90V650A
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁(yè)數(shù): 39/120頁(yè)
文件大小: 1690K
代理商: MB90V650A
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39
MB90650A Series
3. I/O Extended Serial Interface
I/O extended serial interface consists of an 8-bit serial I/O interface that can perform clock synchronous data
transfer. Either LSB-first or MSB-first data transfer can be selected.
The following two serial I/O operation modes are available.
Internal shift clock mode: Data transfer is synchronized with the internal clock.
External shift clock mode: Data transfer is synchronized with the clock input from the external pin (SCK). By
manipulating the general-purpose port that shares the external pin (SCK), this
mode also enables the data transfer operation to be driven by CPU instructions.
(1) Register Details
SMD2 SMD1 SMD0
SIE
SIR
BUSY STOP STRT
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
*1
R
R/W
R/W
*2
Initial value
Initial value
Initial value
00000010
B
MODE
BDS
SOE
SCOE
- - - - 0 0 0 0
B
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
R
X
: Readable and writable
: Read only
: Unused
: Indeterminate
D7
D6
D5
D4
D3
D2
D1
D0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
XXXXXXXX
B
Serial data register 0, 1 (SDR0, SDR1)
Address : 000025
H
000029
H
Address : 000024
H
000028
H
Address : 000026
H
00002A
H
Serial mode control status register 0, 1 (SMCS0, SMCS1)
*1: Only “0” can be written.
*2: Only “1” can be written. Reading always returns “0”.
This register controls the transfer operation mode of the serial I/O. The following describes the function of each bit.
bit 3: Serial mode selection bit (MODE)
This bit selects the conditions for starting operation from the halted state. Changing the mode during
operation is prohibited
MODE
The bit is initialized to “0” by a reset. The bit is readable and writable. Set to “1” when using the intelligent I/O
service.
Operation
0
Start when STRT is set to “1”. [Initial value]
1
Start on reading from or writing to the serial data register.
bit 2: Transfer direction selection bit (BDS: Bit Direction Select)
Selects as follows at the time of serial data input and output whether the data are to be transferred in
the order from LSB to MSB or vice versa.
MODE
Operation
0
LSB-first [Initial value]
1
MSB-first
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