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參數(shù)資料
| 型號： | MB90P641APFV |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, OTPROM, 17 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 81/94頁 |
| 文件大?。?/td> | 1542K |
| 代理商： | MB90P641APFV |
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82
MB90640A Series
Table 10
Increment and Decrement Instructions (Byte/Word/Long Word) [12 Instructions]
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Table 11
Compare Instructions (Byte/Word/Long Word) [11 Instructions]
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
RG
BOperation
LH AH
I
S
T
N
Z
V
C
RMW
INC
ear
INC
eam
DEC
ear
DEC
eam
2
2+
2
2+
2
5+ (a)
3
5+ (a)
2
0
2
0
2
× (b)
0
2
× (b)
byte (ear)
← (ear) +1
byte (eam)
← (eam) +1
byte (ear)
← (ear) –1
byte (eam)
← (eam) –1
–
*
–
*
–
*
INCW
ear
INCW
eam
DECW ear
DECW eam
2
2+
2
2+
3
5+ (a)
3
5+ (a)
2
0
2
0
2
× (c)
0
2
× (c)
word (ear)
← (ear) +1
word (eam)
← (eam) +1
word (ear)
← (ear) –1
word (eam)
← (eam) –1
–
*
–
*
–
*
INCL
ear
INCL
eam
DECL
ear
DECL
eam
2
2+
2
2+
7
9+ (a)
7
9+ (a)
4
0
4
0
2
× (d)
0
2
× (d)
long (ear)
← (ear) +1
long (eam)
← (eam) +1
long (ear)
← (ear) –1
long (eam)
← (eam) –1
–
*
–
*
–
*
Mnemonic
#
~
RG
B
Operation
LH AH
I
S
T
N
Z
V
C
RMW
CMP
A
CMP
A, ear
CMP
A, eam
CMP
A, #imm8
1
2
2+
2
1
2
3+ (a)
2
0
1
0
(b)
0
byte (AH) – (AL)
byte (A)
← (ear)
byte (A)
← (eam)
byte (A)
← imm8
–
*
–
CMPW A
CMPW A, ear
CMPW A, eam
CMPW A, #imm16
1
2
2+
3
1
2
3+ (a)
2
0
1
0
(c)
0
word (AH) – (AL)
word (A)
← (ear)
word (A)
← (eam)
word (A)
← imm16
–
*
–
CMPL
A, ear
CMPL
A, eam
CMPL
A, #imm32
2
2+
5
6
7+ (a)
3
2
0
(d)
0
word (A)
← (ear)
word (A)
← (eam)
word (A)
← imm32
–
*
–
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