- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377916 > MB90F423GA (Fujitsu Limited) Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 PDF資料下載
參數(shù)資料
| 型號： | MB90F423GA |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125 |
| 中文描述： | 16位微控制器原件 |
| 文件頁數(shù)： | 87/99頁 |
| 文件大小： | 1706K |
| 代理商： | MB90F423GA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁當(dāng)前第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁
MB90420G/5G (A) Series
87
Table 13 Signed Multiplication and Division Instructions (Byte/Word/Long Word) [11 Instructions]
*1: Set to 3 when the division-by-0, 8 or 18 for an overflow, and 18 for normal operation.
*2: Set to 3 when the division-by-0, 10 or 21 for an overflow, and 22 for normal operation.
*3: Set to 4 + (a) when the division-by-0, 11 + (a) or 22 + (a) for an overflow, and 23 + (a) for normal operation.
*4: Positive dividend: Set to 4 when the division-by-0, 10 or 29 for an overflow, and 30 for normal operation.
Negative dividend: Set to 4 when the division-by-0, 11 or 30 for an overflow and 31 for normal operation.
*5: Positive dividend:Set to 4 + (a) when the division-by-0, 11 + (a) or 30 + (a) for an overflow, and 31 + (a) for
normal operation.
Negative dividend:Set to 4 + (a) when the division-by-0, 12 + (a) or 31 + (a) for an overflow, and 32 + (a) for
normal operation.
*6: When the division-by-0, (b) for an overflow, and 2
×
(b) for normal operation.
*7: When the division-by-0, (c) for an overflow, and 2
×
(c) for normal operation.
*8: Set to 3 when byte (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*9: Set to 3 when byte (ear) is zero, 12 when the result is positive, and 13 when the result is negative.
*10: Set to 4 + (a) when byte (eam) is zero, 13 + (a) when the result is positive, and 14 + (a) when the result is negative.
*11: Set to 3 when word (AH) is zero, 12 when the result is positive, and 13 when the result is negative.
*12: Set to 3 when word (ear) is zero, 16 when the result is positive, and 19 when the result is negative.
*13: Set to 4 + (a) when word (eam) is zero, 17 + (a) when the result is positive, and 20 + (a) when the result is
negative.
Notes: When overflow occurs during DIV or DIVW instruction execution, the number of execution cycles takes
two values because of detection before and after an operation.
When overflow occurs during DIV or DIVW instruction execution, the contents of AL are destroyed.
For (a) to (d), refer to “Table 4 Number of Execution Cycles for Effective Address in Addressing Modes”
and “Table 5 Correction Values for Number of Cycles for Calculating Actual Number of Cycles.”
Mnemonic
#
~
RG
B
Operation
LH
AH
I
S
T
N
Z
V
C
RMW
DIV
A
DIV
A, ear
DIV
A, eam
DIVW
A, ear
DIVW
A, eam
MULU
MULU
MULU
MULUW A
MULUW A, ear
MULUW A, eam
A
A, ear
A, eam
2
2
2 +
2
2+
2
2
2 +
2
2
2 +
*1
*2
*3
*4
*5
*8
*9
*10
*11
*12
*13
0
1
0
1
0
0
1
0
0
1
0
0
0
*6
0
*7
0
0
(b)
0
0
(c)
word (AH) /byte (AL)
Quotient
→
byte (AL)
Remainder
→
byte (AH)
word (A)/byte (ear)
Quotient
→
byte (A)
Remainder
→
byte (ear)
word (A)/byte (eam)
Quotient
→
byte (A)
Remainder
→
byte (eam)
long (A)/word (ear)
Quotient
→
word (A)
Remainder
→
word (ear)
long (A)/word (eam)
Quotient
→
word (A)
Remainder
→
word (eam)
byte (AH) *byte (AL)
→
word (A)
byte (A) *byte (ear)
→
word (A)
byte (A) *byte (eam)
→
word (A)
word (AH) *word (AL)
→
long (A)
word (A) *word (ear)
→
long (A)
word (A) *word (eam)
→
long (A)
Z
Z
Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
–
–
–
–
–
–
*
*
*
*
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB90F428G | Octal Transparent D-type Latches With 3-State Outputs 20-LCCC -55 to 125 |
| MB90427G | 16-Bit Original Microcontroller |
| MB90428G | Octal D-type Transparent Latches With 3-State Outputs 20-LCCC -55 to 125 |
| MB90F428GA | 16-Bit Original Microcontroller |
| MB90428GA | 16-Bit Original Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F428GAPMC-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F428GCPFR-GSE1 | 制造商:FUJITSU 功能描述: |
| MB90F438LSPFR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F438LSPMCR-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F439PMCR-GE1 | 制造商:FUJITSU 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。